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    參數(shù)資料
    型號: AD9042
    廠商: Analog Devices, Inc.
    英文描述: 12-Bit, 41 MSPS Monolithic A/D Converter(41MSPS,單片12位A/D轉(zhuǎn)換器)
    中文描述: 12位,41 MSPS的單片機(jī)的A / D轉(zhuǎn)換器(41MSPS,單片12位的A / D轉(zhuǎn)換器)
    文件頁數(shù): 2/24頁
    文件大?。?/td> 410K
    代理商: AD9042
    DC SPECIFICATIONS
    T est
    Level
    AD9042AST
    Min
    T yp
    T est
    Level
    AD9042AD
    T yp
    Parameter
    T emp
    Max
    Min
    Max
    Units
    RESOLUT ION
    12
    12
    Bits
    DC ACCURACY
    No Missing Codes
    Offset Error
    Offset T empco
    Gain Error
    Gain T empco
    Full
    Full
    Full
    Full
    Full
    VI
    VI
    V
    VI
    V
    Guaranteed
    ±
    3
    25
    0
    –50
    VI
    VI
    V
    VI
    V
    Guaranteed
    ±
    3
    25
    0
    –50
    –10
    +10
    –10
    +10
    mV
    ppm/
    °
    C
    % FS
    ppm/
    °
    C
    –6.5
    +6.5
    –6.5
    +6.5
    REFERENCE OUT (V
    REF
    )
    2
    +25
    °
    C
    V
    2.4
    V
    2.4
    V
    ANALOG INPUT (AIN)
    Input Voltage Range
    Input Resistance
    Input Capacitance
    V
    REF
    ±
    0.500
    250
    5.5
    V
    REF
    ±
    0.500
    250
    7
    V
    pF
    Full
    +25
    °
    C
    IV
    V
    200
    300
    IV
    V
    200
    300
    ENCODE INPUT
    3
    Logic Compatibility
    4
    Logic “1” Voltage
    Logic “0” Voltage
    Logic “1” Current (V
    INH
    = 5 V)
    Logic “0” Current (V
    INL
    = 0 V)
    Input Capacitance
    T T L /CMOS
    2.0
    0
    450
    625
    –400
    –300
    2
    T T L /CMOS
    Full
    Full
    Full
    Full
    +25
    °
    C
    VI
    VI
    VI
    VI
    V
    5.0
    0.8
    800
    –200
    VI
    VI
    VI
    VI
    V
    2.0
    0
    450
    –400
    5.0
    0.8
    800
    –200
    V
    V
    μ
    A
    μ
    A
    pF
    625
    –300
    2.5
    DIGIT AL OUT PUT S
    Logic Compatibility
    Logic “1” Voltage (I
    OH
    = 10
    μ
    A)
    CMOS
    4.2
    CMOS
    4.2
    +25
    °
    C
    Full
    +25
    °
    C
    Full
    I
    IV
    I
    IV
    3.5
    3.5
    I
    IV
    I
    IV
    3.5
    3.5
    V
    V
    V
    V
    Logic “0” Voltage (I
    OL
    = 10
    μ
    A)
    0.75
    0.80
    0.85
    0.75
    0.80
    0.85
    Output Coding
    T wos Complement
    T wos Complement
    POWER SUPPLY
    AV
    CC
    Supply Voltage
    I (AV
    CC
    ) Current
    DV
    CC
    Supply Voltage
    I (DV
    CC
    ) Current
    I
    CC
    (T otal) Supply Current
    Power Dissipation
    Power Supply Rejection
    (PSRR)
    Full
    Full
    Full
    Full
    Full
    Full
    +25
    °
    C
    Full
    VI
    V
    VI
    V
    VI
    VI
    I
    V
    5.0
    109
    5.0
    10
    119
    595
    ±
    1
    ±
    5
    VI
    V
    VI
    V
    VI
    VI
    I
    V
    5.0
    109
    5.0
    10
    119
    595
    ±
    1
    ±
    5
    V
    mA
    V
    mA
    mA
    mW
    mV/V
    mV/V
    147
    735
    +20
    147
    735
    +20
    –20
    –20
    NOT ES
    1
    C1 (Pin 10 on AD9042AST only) tied to GND through 0.01
    μ
    F capacitor.
    2
    V
    is normally tied to V
    through 50
    . If V
    REF
    is used to provide dc offset to other circuits, it should first be buffered.
    3
    ENCODE driven by single-ended source;
    ENCODE
    bypassed to ground through 0.01
    μ
    F capacitor.
    4
    ENCODE may also be driven differentially in conjunction with
    ENCODE
    ; see “Encoding the AD9042” for details.
    Specifications subject to change without notice.
    (AV
    CC
    = DV
    CC
    = +5 V; ENCODE &
    ENCODE
    = 41 MSPS;
    V
    REF
    tied to V
    OFFSET
    through 50
    ; T
    MN
    = –40
    8
    C, T
    MAX
    = +85
    8
    C)
    1
    SWITCHING SPECIFICATIONS
    T est
    Level
    AD9042AST
    Min
    T yp
    T est
    Level
    AD9042AD
    Min
    T yp
    Parameter (Conditions)
    T emp
    Max
    Max
    Units
    Maximum Conversion Rate
    Minimum Conversion Rate
    Aperture Delay (t
    A
    )
    Aperture Uncertainty (Jitter)
    ENCODE Pulse Width High
    ENCODE Pulse Width Low
    Output Delay (t
    OD
    )
    Full
    Full
    +25
    °
    C
    +25
    °
    C
    +25
    °
    C
    +25
    °
    C
    Full
    VI
    IV
    V
    V
    IV
    IV
    IV
    41
    VI
    IV
    V
    V
    IV
    IV
    IV
    41
    MSPS
    MSPS
    ps
    ps rms
    ns
    ns
    ns
    5
    5
    –250
    0.7
    –250
    0.7
    10
    10
    5
    10
    10
    5
    9
    14
    9
    14
    NOT E
    1
    C1 (Pin 10 on AD9042AST only) tied to GND through 0.01
    μ
    F capacitor.
    REV. A
    (AV
    CC
    = DV
    CC
    = +5V; V
    REF
    tied to V
    OFFSET
    through 50
    ; T
    MN
    = –40
    8
    C, T
    MAX
    = +85
    8
    C)
    1
    –2–
    AD9042–SPECIFICATIONS
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