參數(shù)資料
型號: AD8883B
廠商: Analog Devices, Inc.
英文描述: 60 MHz, 2000 V/us Monolithic Op Amp
中文描述: 60兆赫,2000年第V /我們單片運算放大器
文件頁數(shù): 11/16頁
文件大?。?/td> 258K
代理商: AD8883B
REV. D
AD844
–11–
Noise
Noise sources can be modeled in a manner similar to the dc bias
currents, but the noise sources are I
NN
, I
NP
, V
N
, and the amplifier
induced noise at the output, V
ON
, is:
V
ON
=
((
Inp R
P
)
2
+
Vn
2
) 1
+
R
1
R
2
2
+
(
Inn R
1)
2
Overall noise can be reduced by keeping all resistor values to a
minimum. With typical numbers,
R
1
=
R
2 = 1 k
,
R
P
= 0,
Vn
= 2 nV/
Hz
,
Inp
= 10 pA/
Hz
,
Inn
= 12 pA/
Hz
,
V
ON
calculates to 12 nV/
Hz
. The current noise is dominant in
this case, as it will be in most low gain applications.
Video Cable Driver Using 5 Volt Supplies
The AD844 can be used to drive low impedance cables. Using
±
5 V supplies, a 100
load can be driven to
±
2.5 V with low
distortion. Figure 11a shows an illustrative application which
provides a noninverting gain of 2, allowing the cable to be
reverse-terminated while delivering an overall gain of +1 to the
load. The
3 dB bandwidth of this circuit is typically 30 MHz.
Figure 11b shows a differential gain and phase test setup. In
video applications, differential-phase and differential-gain
characteristics are often important. Figure 11c shows the varia-
tion in phase as the load voltage varies. Figure 11d shows the
gain variation.
V
IN
50
3
2
+5V
5V
7
6
4
2.2 F
2.2 F
50
300
300
Z
O
= 50
V
OUT
R
L
50
Figure 11a. The AD844 as a Cable Driver
HP8753A
NETWORK
ANALYZER
HP11850C
SPLITTER
CIRCUIT
UNDER
TEST
HP3314A
STAIRCASE
GENERATOR
V
OUT
V
IN
V
IN
OUT
OUT
OUT
IN
RF OUT
R
EXT
TRIG
SYNC OUT
50
(TERMINATOR)
OUT
470
Figure 11b. Differential Gain/Phase Test Setup Figure
V
OUT
IRE
D
0.3
0.2
0.3
0
18
90
36
54
72
0.1
0
0.1
0.2
IRE = 7.14mV
Figure 11c. Differential Phase for the Circuit of Figure 11a
V
OUT
IRE
D
0.06
0.04
0.06
0
18
90
36
54
72
0.02
0
0.02
0.04
IRE = 7.14mV
Figure 11d. Differential Gain for the Circuit of Figure 11a
High Speed DAC Buffer
The AD844 performs very well in applications requiring
current-to-voltage conversion. Figure 12 shows connections for
use with the AD568 current output DAC. In this application the
bipolar offset is used so that the full-scale current is
±
5.12 mA,
which generates an output of
±
5.12 V usingdecoupling and
grounding techniques to achieve the full 12-bit accuracy and
realize the fast settling capabilities of the system. The unmarked
capacitors in this figure are 0.1
μ
F ceramic (for the 1 k
appli-
cation resistor on the AD568. Figure 13 shows the full-scale
transient response. Care is needed in power supply example,
AVX Type SR305C104KAA), and the ferrite inductors should
be about 2.5
μ
H (for example, Fair-Rite Type 2743002122).
The AD568 data sheet should be consulted for more complete
details about its use.
Applications–
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