參數(shù)資料
型號： AD8802
廠商： Analog Devices, Inc.
英文描述： 12 Channel, 8-Bit TrimDACs with Power Shutdown
中文描述： 12通道，8位與電源關(guān)斷TrimDACs
文件頁數(shù)： 2/16頁
文件大小： 432K
代理商： AD8802
Parameter
Symbol
Conditions
Min
Typ
1
Max
Units
STATIC ACCURACY
Specifications apply to all DACs
Resolution
Differential Nonlinearity Error
Integral Nonlinearity Error
Full-Scale Error
Zero Code Error
DAC Output Resistance
Output Resistance Match
N
DNL
INL
G
FSE
V
ZSE
R
OUT
R/R
O
8
–1
–1.5
–1
–1
3
Bits
LSB
LSB
LSB
LSB
k
%
Guaranteed Monotonic
±
1/4
±
1/2
1/2
1/4
5
1.5
+1
+1.5
+1
+1
8
REFERENCE INPUT
Voltage Range
2
V
REFH
V
REFL
R
REFH
R
REFL
C
REF0
C
REF1
0
0
V
DD
V
DD
V
V
k
k
pF
pF
Pin Available on AD8804 Only
Digital Inputs = 55
H
, V
REFH
= V
DD
Digital Inputs = 55
H
, V
REFL
= V
DD
Digital Inputs all Zeros
Digital Inputs all Ones
REFH Input Resistance
REFL Input Resistance
3
Reference Input Capacitance
3
1.2
1.2
32
32
DIGITAL INPUTS
Logic High
Logic Low
Logic High
Logic Low
Input Current
Input Capacitance
3
V
IH
V
IL
V
IH
V
IL
I
IL
C
IL
V
DD
= +5 V
V
DD
= +5 V
V
DD
= +3 V
V
DD
= +3 V
V
IN
= 0 V or + 5 V
2.4
V
V
V
V
μ
A
pF
0.8
2.1
0.6
±
1
5
POWER SUPPLIES
4
Power Supply Range
Supply Current (CMOS)
Supply Current (TTL)
Shutdown Current
Power Dissipation
Power Supply Sensitivity
V
DD
Range
I
DD
I
DD
I
REFH
P
DISS
PSRR
2.7
5.5
10
4
10
55
0.002
V
μ
A
mA
μ
A
μ
W
%/%
V
IH
= V
DD
or V
IL
= 0 V
V
IH
= 2.4 V or V
IL
= 0.8 V, V
DD
= +5.5 V
SHDN
= 0
V
IH
= V
DD
or V
IL
= 0 V, V
DD
= +5.5 V
V
DD
= +5 V
±
10%
0.01
1
0.2
0.001
DYNAMIC PERFORMANCE
3
V
OUT
Settling Time
Crosstalk
t
S
CT
±
1/2 LSB Error Band
Between Adjacent Outputs
5
0.6
50
μ
s
dB
SWITCHING CHARACTERISTICS
3, 6
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CS
Setup Time
CS
High Pulse Width
Reset Pulse Width
CLK Rise to
CS
Rise Hold Time
CS
Rise to Clock Rise Setup
t
CH
, t
CL
t
DS
t
DH
t
CSS
t
CSW
t
RS
t
CSH
t
CS1
Clock Level High or Low
15
5
5
10
10
90
20
10
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
1
Typicals represent average readings at +25
°
C.
2
V
can be any value between GND and V
, for the AD8804 V
REFL
can be any value between GND and V
DD
.
3
Guaranteed by design and not subject to production test.
4
Digital Input voltages V
= 0 V or V
for CMOS condition. DAC outputs unloaded. P
is calculated from (I
DD
×
V
DD
).
5
Measured at a V
pin where an adjacent V
pin is making a full-scale voltage change (f = 100 kHz).
6
See timing diagram for location of measured values. All input control voltages are specified with t
R
= t
F
= 2 ns (10% to 90% of V
DD
) and timed from a voltage level of
1.6 V.
Specifications subject to change without notice.
AD8802/AD8804–SPECIFICATIONS
REV. 0
–2–
(V
DD
= +3 V
6
10% or +5 V
6
10%, V
REFH
= +V
DD
, V
REFL
= 0 V, –40
8
C
≤
T
A
≤
+85
8
C unless otherwise noted)
相關(guān)PDF資料
PDF描述
AD8802AN 12 Channel, 8-Bit TrimDACs with Power Shutdown
AD8802AR 12 Channel, 8-Bit TrimDACs with Power Shutdown
AD8802ARU 12 Channel, 8-Bit TrimDACs with Power Shutdown
AD8804 12 Channel, 8-Bit TrimDACs with Power Shutdown(12通道,帶電源關(guān)斷8位D/A轉(zhuǎn)換器)
AD8842 Precision, Quad, SPST Analog Switches
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