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參數(shù)資料
| 型號： | AD8651 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| 中文描述： | 50兆赫，精密，低失真，低噪聲CMOS運(yùn)算放大器 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 558K |
| 代理商： | AD8651 |
AD8651/AD8652
oscillations. With the AD8651, additional input damping is
required for stability with capacitive loads greater than 47 pF
with direct input to output feedback (see the next section).
Output Capacitance
When using high speed amplifiers, it is important to consider
the effects of the capacitive loading on the amplifier’s stability.
Capacitive loading interacts with the output impedance of the
amplifier, causing reduction of the BW as well as peaking and
ringing of the frequency response. To reduce the effects of the
capacitive loading and allow higher capacitive loads, there are
two commonly used methods:
Rev. B | Page 16 of 20
1) As shown in Figure 55, place a small value resistor (R
S
) in
series with the output to isolate the load capacitor from the
amplifier’s output. Heavy capacitive loads can reduce the phase
margin of an amplifier and cause the amplifier response to peak
or become unstable. The AD8651 is able to drive up to 47 pF in
a unity gain buffer configuration without oscillation or external
compensation. However, if an application will require a higher
capacitive load drive when the AD8651 is in unity gain, then
the use of external isolation networks can be used. The effect
produced by this resistor is to isolate the op amp output from
the capacitive load. The required amount of series resistance has
been tabulated in Table 5 for different capacitive load. While
this technique will improve the overall capacitive load drive for
the amplifier, its biggest drawback is that it reduces the output
swing of the overall circuit.
+
AD8651
–
V
V–
V
IN
0
0
0
3
2
U1
RL
CL
R
S
V
OUT
V
CC
0
Figure 55. Driving Large Capacitive Loads
Table 5. Optimum Values for Driving Large Capacitive Loads
CL
100 pF
500 pF
1.0 nF
2) Another way to stabilize an op amp driving a large capacitive
load is to use a snubber network, as shown in Figure 56.
Because there is not any isolation resistor in the signal path, this
method has the significant advantage of not reducing the output
swing. The exact values of R
S
and C
S
are derived experimentally.
In Figure 56, an optimum R
S
and C
S
combination for a
capacitive load drive ranging from 50 pF to 1 nF was chosen.
For this, R
S
= 3 and C
S
= 10 nF were chosen.
R
S
50
35
25
+
AD8651
–
V
V–
200mV
RL
CL
R
S
C
S
V
OUT
V
+
V–
0
Figure 56. Snubber Network
Settling Time
The settling time of an amplifier is defined as the time it takes
for the output to respond to a step change of input and enter
and remain within a defined error band, as measured relative to
the 50% point of the input pulse. This parameter is especially
important in measurements and control circuits where amplifi-
ers are used to buffer A/D inputs or DAC outputs. The design of
the AD8651 combines a high slew rate and a wide gain band-
width product to produce an amplifier with very fast settling
time. The AD8651 is configured in the noninverting gain of 1
with a 2 V p-p step applied to its input. The AD8651 has a
settling time of about 130 ns to 0.01% (2 mV). The output is
monitored with a 10×, 10 M, 11.2 pF scope probe.
THD Readings vs. Common-Mode Voltage
Total harmonic distortion of the AD8651 is well below 0.0004%
with any load down to 600 . The distortion is a function of the
circuit configuration, the voltage applied, and the layout, in
addition to other factors. The AD8651 outperforms its
competitor for distortion, especially at frequencies below
20 kHz, as shown in Figure 57.
T
0.0001
0.0002
0.0005
0.001
0.002
0.005
0.01
0.02
0.05
0.1
FREQUENCY (Hz)
AD8651
V
SY
= +3.5V/–1.5V
V
OUT
= 2.0V p-p
20
50
100
500
20k
5k
2k
1k
OPA350
0
Figure 57. Total Harmonic Distortion
+
–
V
2V p-p
47pF
600
V
OUT
3.5V
–1.5V
AD8651
0
Figure 58. THD + N Test Circuit
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PDF描述 |
|---|---|
| AD8651AR | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8651AR-REEL7 | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8651ARM | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8651ARM-R2 | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8652 | 50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8651_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8651AR | 制造商:Analog Devices 功能描述:OP Amp Single GP R-R I/O 5.5V 8-Pin SOIC N 制造商:Rochester Electronics LLC 功能描述:SINGLE, PRECISION CMOS RAIL-RAIL OP AMP - Bulk 制造商:Analog Devices 功能描述:OP AMP 50MHZ RRI/O 8651 SOIC8 |
| AD8651ARM | 制造商:AD 制造商全稱:Analog Devices 功能描述:50 MHz, Precision, Low Distortion, Low Noise CMOS Amplifiers |
| AD8651ARM-R2 | 功能描述:IC OPAMP VF CMOS 50MHZ LN 8MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:DigiTrim® 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):1 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.11 V/µs 增益帶寬積:350kHz -3db帶寬:- 電流 - 輸入偏壓:4nA 電壓 - 輸入偏移:20µV 電流 - 電源:260µA 電流 - 輸出 / 通道:20mA 電壓 - 電源，單路/雙路(±):2.7 V ~ 36 V，±1.35 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SO 包裝:帶卷 (TR) |
| AD8651ARM-REEL | 制造商:Analog Devices 功能描述:OP Amp Single GP R-R I/O 5.5V 8-Pin MSOP T/R 制造商:Rochester Electronics LLC 功能描述:SINGLE, PRECISION CMOS RAIL-RAIL OP AMP - Tape and Reel |
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