參數(shù)資料
型號(hào)： AD8616AR
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 4/20頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP GP R-R CMOS 24MHZ 8SOIC
標(biāo)準(zhǔn)包裝： 98
系列： DigiTrim®
放大器類型： 通用
電路數(shù)： 2
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 12 V/µs
增益帶寬積： 24MHz
電流 - 輸入偏壓： 0.2pA
電壓 - 輸入偏移： 23µV
電流 - 電源： 1.7mA
電流 - 輸出 / 通道： 150mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 5.5 V，±1.35 V ~ 2.75 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 管件
AD8615/AD8616/AD8618
Data Sheet
Rev. F | Page 12 of 20
OVERLOAD RECOVERY TIME
Overload recovery time is the time it takes the output of the
amplifier to come out of saturation and recover to its linear region.
Overload recovery is particularly important in applications where
small signals must be amplified in the presence of large transients.
Figure 40 and Figure 41 show the positive and negative overload
recovery times of the AD8616. In both cases, the time elapsed
before the AD8616 comes out of saturation is less than 1 μs. In
addition, the symmetry between the positive and negative recovery
times allows excellent signal rectification without distortion to the
output signal.
TIME (1s/DIV)
VS = ±2.5V
RL = 10k
AV = 100
VIN = 50mV
–50mV
+2.5V
0V
0
46
48
-04
0
Figure 40. Positive Overload Recovery
TIME (1s/DIV)
VS =±2.5V
RL = 10k
AV = 100
VIN = 50mV
+50mV
–
2.5V
0V
04
64
8-
04
1
Figure 41. Negative Overload Recovery
D/A CONVERSION
The AD8616 can be used at the output of high resolution DACs.
The low offset voltage, fast slew rate, and fast settling time make
the part suitable to buffer voltage output or current output
DACs.
Figure 42 shows an example of the AD8616 at the output of the
AD5542. The AD8616’s rail-to-rail output and low distortion
help maintain the accuracy needed in data acquisition systems
and automated test equipment.
AD5542
VOUT
UNIPOLAR
OUTPUT
AGND
DGND
REFS
1/2
AD8616
REFF
VDD
SERIAL
INTERFACE
0.1
F
0.1F
10F
5V
2.5V
+
CS
DIN
SCLK
LDAC
0
46
48
-0
42
Figure 42. Buffering DAC Output
LOW NOISE APPLICATIONS
Although the AD8618 typically has less than 8 nV/√Hz of voltage
noise density at 1 kHz, it is possible to reduce it further. A simple
method is to connect the amplifiers in parallel, as shown in
Figure 43. The total noise at the output is divided by the square
root of the number of amplifiers. In this case, the total noise is
approximately 4 nV/√Hz at room temperature. The 100 Ω
resistor limits the current and provides an effective output
resistance of 50 Ω.
V–
R3
100
R1
10
V+
VIN
3
2
1
R2
1k
V–
R6
100
R4
10
V+
3
2
1
R5
1k
V–
R9
100
R7
10
V+
3
2
1
R8
1k
V–
R12
100
R10
10
V+
3
2
1
R11
1k
VOUT
04
64
8-
04
3
Figure 43. Noise Reduction
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