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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AD842JQ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 10/16闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OPAMP GP 80MHZ 100MA 14CDIP |
| 妯欐簴鍖呰锛� | 25 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 375 V/µs |
| 澧炵泭甯跺绌嶏細 | 80MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 4.2µA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 500µV |
| 闆绘祦 - 闆绘簮锛� | 13mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 100mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | ±5 V ~ 18 V |
| 宸ヤ綔婧害锛� | 0°C ~ 75°C |
| 瀹夎椤炲瀷锛� | 閫氬瓟 |
| 灏佽/澶栨锛� | 14-CDIP锛�0.300"锛�7.62mm锛� |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 14-CERDIP |
| 鍖呰锛� | 绠′欢 |
Data Sheet
AD842
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS鈥斅�15 V OPERATION
TA = 25掳C, unless otherwise specified. All minimum and maximum specifications are guaranteed. Specifications shown in boldface are
tested on all production units.
Table 1.
Parameter
Test Conditions/
Comments
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
INPUT OFFSET VOLTAGE2
0.5
1.5
0.3
1.0
0.5
1.5
mV
TMIN to TMAX
2.5/2.5/3
1.5
3.5
mV
Offset Drift
14
V/掳C
INPUT BIAS CURRENT
4.2
8
3.5
5
4.2
8
A
TMIN to TMAX
10
6
12
A
Input Offset Current
0.1
0.4
0.05
0.2
0.1
0.4
A
TMIN to TMAX
0.5
0.3
0.6
A
INPUT CHARACTERISTICS
Differential mode
Input Resistance
100
k惟
Input Capacitance
2.0
pF
INPUT VOLTAGE RANGE
Common Mode
卤10
V
Common-Mode Rejection
VCM = 卤10 V
86
115
90
115
86
115
dB
TMIN to TMAX
80
86
80
dB
INPUT VOLTAGE NOISE
f = 1 kHz
9
nV/鈭欻z
Wideband Noise
10 Hz to 10 MHz
28
V rms
OPEN-LOOP GAIN
VOUT = 卤10 V
RLOAD 鈮� 499 惟
40/40/30
90
50
90
40
90
V/mV
TMIN to TMAX
20/20/15
25
20
V/mV
OUTPUT CHARACTERISTICS
Voltage
RLOAD 鈮� 499 惟
卤10
V
Current
VOUT = 卤10 V
100
mA
Open loop
5
惟
FREQUENCY RESPONSE
Gain Bandwidth Product
VOUT = 90 mV,
AVCL = 2
80
MHz
Full Power Bandwidth3
VOUT = 20 V p-p,
RLOAD 鈮� 499 惟
4.7
6
4.7
6
4.7
6
MHz
Rise Time
AVCL = 2
10
ns
Overshoot
AVCL = 2
20
%
Slew Rate
AVCL = 2
300
375
300
375
300
375
V/s
Settling Time4
10 V step
To 0.1%
80
ns
To 0.01%
100
ns
Differential Gain
f = 4.4 MHz
0.015
%
Differential Phase
f = 4.4 MHz
0.035
Degree
POWER SUPPLY
Rated Performance
卤15
V
Operating Range
卤5
卤18
卤5
卤18
卤5
卤18
V
Quiescent Current
13/13/14
14/14/16
13
14
13
14
mA
TMIN to TMAX
16/16/19.5
16
19
mA
Power Supply Rejection
Ratio
卤VS = 卤5 V to
卤18 V
86
100
90
105
86
100
dB
TMIN to TMAX
80
86
80
dB
1 AD842JR specifications differ from those of the AD842JN and AD842JQ due to the thermal characteristics of the SOIC package.
2 Input offset voltage specifications are guaranteed after 5 minutes at T
A = 25掳C.
3 Full power bandwidth = slew rate/2 蟺 V peak.
4 Refer to Figure 29 and Figure 30.
Rev. F | Page 3 of 16
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| AD842JR-16-REEL7 | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:OP Amp Single GP 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:IC OP AMP, AD842JR IC - Tape and Reel |
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