參數(shù)資料
型號(hào)： AD8400ARZ1
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 30/32頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT 8BIT 1K 1CH 8-SOIC
標(biāo)準(zhǔn)包裝： 98
接片： 256
電阻（歐姆）： 1k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 500 ppm/°C
存儲(chǔ)器類型： 易失
接口： 3 線 SPI（芯片選擇）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 管件
產(chǎn)品目錄頁(yè)面： 787 (CN2011-ZH PDF)
AD8400/AD8402/AD8403
Rev. E | Page 7 of 32
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DYNAMIC CHARACTERISTICS6, 10
Bandwidth 3 dB
BW_50 K
R = 50 kΩ
125
kHz
BW_100 K
R = 100 kΩ
71
kHz
Total Harmonic Distortion
THDW
VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz
0.003
%
VW Settling Time
tS_50 K
VA = VDD, VB = 0 V, ±1% error band
9
μs
tS_100 K
VA = VDD, VB = 0 V, ±1% error band
18
μs
Resistor Noise Voltage
eNWB_50 K
RWB = 25 kΩ, f = 1 kHz, RS = 0
20
nV/√Hz
eNWB_100 K
RWB = 50 kΩ, f = 1 kHz, RS = 0
29
nV/√Hz
CT
VA = VDD, VB = 0 V
65
dB
1 Typicals represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.
IW = VDD/R for VDD = 3 V or 5 V for the 50 kΩ and 100 kΩ versions.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.
5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
resistor terminals are left open circuit.
7 Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
8 Worst-case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See Figure 28 for a plot of IDD vs. logic voltage.
9 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
10 All dynamic characteristics use VDD = 5 V.
11 Measured at a VW pin where an adjacent VW pin is making a full-scale voltage change.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8400ARZ1 制造商:Analog Devices 功能描述:Digital Potentiometer
AD8400ARZ10 功能描述:IC DCP SNGL 10K 8-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲(chǔ)器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT
AD8400ARZ10 制造商:Analog Devices 功能描述:Digital Potentiometer (Pots) IC
AD8400ARZ100 功能描述:IC DGTL POT 8BIT 100K 1CH 8-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲(chǔ)器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT
AD8400ARZ100 制造商:Analog Devices 功能描述:IC 8-BIT DIGITAL POT 100K
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