參數(shù)資料
型號: AD8336ACPZ-WP
廠商: Analog Devices Inc
文件頁數(shù): 16/28頁
文件大?。?/td> 0K
描述: IC VGA GP SGL-ENDED 16-LFCSP
標(biāo)準(zhǔn)包裝: 64
系列: X-AMP®
類型: 可變增益放大器
應(yīng)用: 信號處理
安裝類型: 表面貼裝
封裝/外殼: 16-VQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-VQ EP(4x4)
包裝: 托盤 - 晶粒
配用: AD8336-EVALZ-ND - BOARD EVALUATION FOR AD8336
AD8336
Rev. C | Page 23 of 28
Circuit Configuration for Inverting Gain
The preamplifier can also be used in an inverting configuration,
as shown in Figure 81.
PRAO
34dB
AD8336
PREAMPLIFIER
INPP
4
5
+
8
VOUT
1
9
GAIN = 9.6dB INPN
RFB1
100
RFB2
301
–60dB TO 0dB
13
VPOS
VNEG
10
+5V
–5V
PWRA
VGAI
2
3
VCOM
062
28-
0
81
Figure 81. Circuit Configuration for Inverting Gain
The considerations regarding total resistance vs. distortion, noise,
and power that were noted in the noninverting case also apply
in the inverting case, except that the amplifier can be operated
at unity inverting gain. The signal gain is reduced while the
noise gain is the same as for the noninverting configuration:
FB1
FB2
R
Gain
Signal
=
and
1
+
=
FB1
FB2
R
Gain
Noise
USING THE POWER ADJUST FEATURE
The AD8336 has the provision to operate at lower power with a
trade-off in bandwidth. The power reduction applies to the preamp
and the VGA sections, and the bandwidth is reduced equally
between them. Reducing the power is particularly useful when
operating with higher supply voltages and lower values of output
loading that would otherwise stress the output amplifiers. When
Pin PWRA is grounded, the amplifiers operate in their default
mode, and the combined 3 dB bandwidth is 80 MHz with the
preamp gain adjusted to 4×. When the voltage on Pin PWRA is
between 1.2 V and 5 V, the power is reduced by approximately
half and the 3 dB bandwidth reduces to approximately 35 MHz.
The voltage at Pin PWRA must not exceed 5 V.
DRIVING CAPACITIVE LOADS
The output stages of the AD8336 are stable with capacitive loads
up to 47 pF for a supply voltage of ±3 V and with capacitive loads
up to 10 pF for supply voltages up to ±8 V. For larger combined
values of load capacitance and/or supply voltage, a 20 Ω series
resistor is recommended for stability.
The influence of capacitance and supply voltage are shown in
Figure 50 and Figure 51, where representative combinations of
load capacitance and supply voltage requiring a 20 Ω resistor
are marked with an asterisk. No resistor is required for the ±3 V
plots in Figure 49, but a resistor is required for most of the ±12 V
plots in Figure 51.
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