參數(shù)資料
型號： AD8336-EVALZ
廠商： Analog Devices Inc
文件頁數(shù)： 16/28頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD8336
標準包裝： 1
系列： X-AMP®
每 IC 通道數(shù)： 1 - 單
放大器類型： 可變增益
輸出類型： 單端
轉(zhuǎn)換速率： 550 V/µs
-3db帶寬： 115MHz
電流 - 輸出 / 通道： 20mA
工作溫度： -55°C ~ 125°C
電流供應(yīng)（主 IC）： 28mA
電壓 - 電源，單路/雙路(±)： ±3 V ~ 12 V
板類型： 完全填充
已供物品： 板
已用 IC / 零件： AD8336
產(chǎn)品目錄頁面： 775 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： AD8336ACPZ-WP-ND - IC VGA GP SGL-ENDED 16-LFCSP
AD8336ACPZ-RL-ND - IC VGA GP SGL-ENDED 16-LFCSP
AD8336ACPZ-R7DKR-ND - IC VGA GP SGL-ENDED 16-LFCSP
AD8336ACPZ-R7CT-ND - IC VGA GP SGL-ENDED 16-LFCSP
AD8336ACPZ-R7TR-ND - IC VGA GP SGL-ENDED 16-LFCSP
AD8336
Rev. C | Page 23 of 28
Circuit Configuration for Inverting Gain
The preamplifier can also be used in an inverting configuration,
as shown in Figure 81.
PRAO
34dB
AD8336
PREAMPLIFIER
INPP
4
5
+
–
8
VOUT
1
9
GAIN = 9.6dB INPN
RFB1
100
RFB2
301
–60dB TO 0dB
13
VPOS
VNEG
10
+5V
–5V
PWRA
VGAI
2
3
VCOM
062
28-
0
81
Figure 81. Circuit Configuration for Inverting Gain
The considerations regarding total resistance vs. distortion, noise,
and power that were noted in the noninverting case also apply
in the inverting case, except that the amplifier can be operated
at unity inverting gain. The signal gain is reduced while the
noise gain is the same as for the noninverting configuration:
FB1
FB2
R
Gain
Signal
=
and
1
+
=
FB1
FB2
R
Gain
Noise
USING THE POWER ADJUST FEATURE
The AD8336 has the provision to operate at lower power with a
trade-off in bandwidth. The power reduction applies to the preamp
and the VGA sections, and the bandwidth is reduced equally
between them. Reducing the power is particularly useful when
operating with higher supply voltages and lower values of output
loading that would otherwise stress the output amplifiers. When
Pin PWRA is grounded, the amplifiers operate in their default
mode, and the combined 3 dB bandwidth is 80 MHz with the
preamp gain adjusted to 4×. When the voltage on Pin PWRA is
between 1.2 V and 5 V, the power is reduced by approximately
half and the 3 dB bandwidth reduces to approximately 35 MHz.
The voltage at Pin PWRA must not exceed 5 V.
DRIVING CAPACITIVE LOADS
The output stages of the AD8336 are stable with capacitive loads
up to 47 pF for a supply voltage of ±3 V and with capacitive loads
up to 10 pF for supply voltages up to ±8 V. For larger combined
values of load capacitance and/or supply voltage, a 20 Ω series
resistor is recommended for stability.
The influence of capacitance and supply voltage are shown in
Figure 50 and Figure 51, where representative combinations of
load capacitance and supply voltage requiring a 20 Ω resistor
are marked with an asterisk. No resistor is required for the ±3 V
plots in Figure 49, but a resistor is required for most of the ±12 V
plots in Figure 51.
相關(guān)PDF資料
PDF描述
AD8331-EVALZ BOARD EVAL FOR AD8331
AD8337-EVALZ BOARD EVALUATION FOR AD8337
EEV-HA1E331UP CAP ALUM 330UF 25V 20% SMD
101A062-100-0 BOOT MOLDED
PM3308-680M-RC INDUCTOR POWER 68UH 0.7A SMD
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