參數(shù)資料
型號： AD8335ACPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 8/28頁
文件大小： 0K
描述： IC AMP VGA QUAD 64LFCSP
產(chǎn)品變化通告： AD8335 Metal Mask Change 12/Jul/2010
標(biāo)準(zhǔn)包裝： 2,500
系列： X-AMP®
類型： 可變增益放大器
應(yīng)用： 信號處理
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
配用： AD8335-EVALZ-ND - BOARD EVALUATION FOR AD8335
AD8335
Data Sheet
Rev. B | Page 16 of 28
THEORY OF OPERATION
Figure 54 is a simplified block diagram of a single channel. Each
channel consists of a low noise preamplifier (PrA) followed by a
VGA with a user-selectable gain of 20 dB or 28 dB. Channels are
enabled in pairs, Channel 1 and Channel 2, and Channel 3 and
Channel 4. The preamps are enabled by grounding the SPxx
pins and powered down by connecting them to the positive supply.
The ENxx pins are connected to the positive supply to enable
the VGAs and the overall channel. HLxx configures VGA for a
fixed gain of 20 dB or 28 dB, with 0 V or 5 V applied to the
HLxx pins, respectively. Channel 1 and Channel 2 share Pin HL12,
and Channel 3 and Channel 4 share Pin HL34. The HLxx pins
are typically hardwired to adjust the VGA gain according to an
ADC resolution of 12 bits for low gain and 10 bits for high gain.
The signal path is fully differential throughout to maximize signal
swing and reduce even-order distortion; however, the preamplifiers
are designed to be driven from a single-ended signal source. Gain
values are referenced from the single-ended PrA input to the
differential output of either the PrA or the VGA. Again referring to
Figure 54, the system gain is distributed as listed in Table 4.
In the remainder of this document, the gain values are rounded
to 10 dB to +38 dB for low gain mode and to 2 dB to +46 dB
for high gain mode. If desired, Equation 1 can be used to calculate
the gain at a value of VGAIN.
ICPT
VGN
Gain
+
=
V
dB
1
.
20
[dB]
(1)
where ICPT = 16.1 dB for low gain mode 8.1 dB for high
gain mode.
Power consumption is 95 mW/channel from a 5 V supply, or
380 mW for all four channels. Power is distributed 35% for the
PrA, and 65% for the remainder of the circuit. The preamps can
be shut down via the SP12 and SP34 pins if a user wants to use
the VGAs only. However, to avoid feedthrough around the
preamp, feedback resistors should not be installed.
Table 4. Channel Gain Distribution
Section
Low Nominal Gain
(dB)
High Nominal Gain
(dB)
PrA
18.06
Attenuator
0 to 48.16
Output Amp
20
27.96
Aggregate
10.1 to +38.6
2.14 to +46.02
ENABLE SUMMARY
Table 5summarizes the enable/shutdown logic and resulting
supply current.
Table 5. Control Pin Logic and Power Consumption
EN12
SP12
EN34
SP34
PrA1/PrA2
VGA1/VGA2
PrA3/PrA4
VGA3/VGA4
IS
High
Low
High
Low
On
76 mA
High
Off
On
Off
On
52 mA
Low
Off
0.8 mA
Low
High
Low
High
Off
0.8 mA
+1
PrA
18dB
HIGH/LOW
+1
INTERPOLATOR
ATTENx
–48dB TO 0dB
GAIN INTERFACE
+1
BIAS
OUTPUT AMP
20dB OR 28dB
VOHx
VOLx
HLxx
SLxx
VGNx
VCMx
VIPx
POPx
ENxx
PMDx
PIPx
PONx
VINx
04
97
6-
05
4
RFB
RS
Figure 54. Simplified Block Diagram of Single Channel
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