Supply Voltage +VS Pins 5, 9, 10, 19, 20, 23, 27 . . . . . . . . . . " />
參數(shù)資料
型號(hào): AD8325ARUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/16頁(yè)
文件大小: 0K
描述: IC LN DVR CATV FINE-STEP 28TSSOP
標(biāo)準(zhǔn)包裝: 50
類型: 線路驅(qū)動(dòng)器,發(fā)射器
應(yīng)用: 調(diào)制解調(diào)器,機(jī)頂盒
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
AD8325
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage +VS
Pins 5, 9, 10, 19, 20, 23, 27 . . . . . . . . . . . . . . . . . . . . . . 6 V
Input Voltages
Pins 25, 26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±0.5 V
Pins 1, 2, 3, 6, 7 . . . . . . . . . . . . . . . . . . . . . –0.8 V to +5.5 V
Internal Power Dissipation
TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 W
Operating Temperature Range . . . . . . . . . . . –40
∞C to +85∞C
Storage Temperature Range . . . . . . . . . . . . –65
∞C to +150∞C
Lead Temperature, Soldering 60 seconds . . . . . . . . . . . 300
∞C
*Stresses above those listed under Absolute Maximum Ratings may cause perma
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD8325
GND
DATEN
SDATA
VCC
CLK
VIN–
GND
VIN+
GND
VCC
TXEN
VCC
GND
SLEEP
GND
BYP
VCC
GND
OUT–
OUT+
ORDERING GUIDE
Model
Temperature Range
Package Description
JA
Package Option
AD8325ARU
–40
∞C to +85∞C
28-Lead TSSOP
67.7
∞C/W1
RU-28
AD8325ARU-REEL
–40
∞C to +85∞C
28-Lead TSSOP
67.7
∞C/W1
RU-28
AD8325ARUZ
2
–40
∞C to +85∞C
28-Lead TSSOP
67.7
∞C/W1
RU-28
AD8325ARUZ-REEL
2
–40
∞C to +85∞C
28-Lead TSSOP
67.7
∞C/W1
RU-28
AD8325-EVAL
Evaluation Board
1Thermal Resistance measured on SEMI standard 4-layer board.
2Z = Pb-free part.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8325 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
Pin No.
Mnemonic
Description
1
DATEN
Data Enable Low Input. This port controls the 8-bit parallel data latch and shift register. A Logic
0-to-1 transition transfers the latched data to the attenuator core (updates the gain) and simulta
neously inhibits serial data transfer into the register. A 1-to-0 transition inhibits the data latch
(holds the previous gain state) and simultaneously enables the register for serial data load.
2
SDATA
Serial Data Input. This digital input allows for an 8-bit serial (gain) word to be loaded into the
internal register with the MSB (Most Significant Bit) first.
3
CLK
Clock Input. The clock port controls the serial attenuator data transfer rate to the 8-bit master-
slave register. A Logic 0-to-1 transition latches the data bit and a 1-to-0 transfers the data bit to
the slave. This requires the input serial data word to be valid at or before this clock transition.
4, 8, 11, 12,
GND
Common External Ground Reference.
13, 16, 17, 18,
22, 24, 28
5, 9, 10, 19,
VCC
Common Positive External Supply Voltage. A 0.1
mF capacitor must decouple each pin.
20, 23, 27
6
TXEN
Logic “0” disables transmission. Logic “1” enables transmission.
7
SLEEP
Low Power Sleep Mode. Logic 0 enables Sleep mode, where ZOUT goes to 400
W and supply
current is reduced to 4 mA. Logic 1 enables normal operation.
14
OUT–
Negative Output Signal.
15
OUT+
Positive Output Signal.
21
BYP
Internal Bypass. This pin must be externally ac-coupled (0.1
mF cap).
25
VIN+
Noninverting Input. DC-biased to approximately VCC/2. Should be ac-coupled with a 0.1
mF
capacitor.
26
VIN–
Inverting Input. DC-biased to approximately VCC/2. Should be ac-coupled with a 0.1
mF capacitor.
PIN FUNCTION DESCRIPTIONS
–4–
REV. A
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