參數(shù)資料
型號(hào): AD8310ARM
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/24頁(yè)
文件大?。?/td> 0K
描述: IC LOGARITHMIC AMP 95DB 8-MSOP
標(biāo)準(zhǔn)包裝: 50
類型: 對(duì)數(shù)放大器
應(yīng)用: 接收器信號(hào)強(qiáng)度指示(RSSI)
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
AD8310
Rev. F | Page 13 of 24
For zero-signal conditions, all the detector output currents are
equal. For a finite input of either polarity, their difference is
converted by the output interface to a single-sided unipolar
current, nominally scaled 2 μA/dB (40 μA/decade), at the
output pin BFIN. An on-chip resistor of ~3 kΩ, R1, converts
this current to a voltage of 6 mV/dB. This is then amplified by a
factor of 4 in the output buffer, which can drive a current of up
to 25 mA in a grounded load resistor. The overall rise time of
the AD8310 is less than 15 ns. There is also a delay time of
about 6 ns when the log amp is driven by an RF burst, starting
at zero amplitude.
When driving capacitive loads, it is desirable to add a low value
of load resistor to speed up the return to the baseline; the buffer
is stable for loads of a least 100 pF. The output bandwidth can
be lowered by adding a grounded capacitor at BFIN. The time-
constant of the resulting single-pole filter is formed with the
3 kΩ internal load resistor (with a tolerance of 20%). Therefore,
to set the 3 dB frequency to 20 kHz, use a capacitor of 2.7 nF.
Using 2.7 μF, the filter corner is at 20 Hz.
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