參數(shù)資料
型號： AD8309ARU
廠商： Analog Devices Inc
文件頁數(shù)： 12/20頁
文件大?。?/td> 0K
描述： IC LOGARITHM AMP 100DB 16-TSSOP
標(biāo)準(zhǔn)包裝： 1
類型： 對數(shù)放大器
應(yīng)用： 接收器信號強(qiáng)度指示（RSSI）
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
REV. B
–2–
AD8309–SPECIFICATIONS
Parameter
Conditions
Min
1
Typ
Max
1
Units
INPUT STAGE
(Inputs INHI, INLO)
Maximum Input
2
Differential Drive, p-p
±3.5
±4V
+9
dBV
Equivalent Power in 50
Terminated in 52.3
+22
dBm
Noise Floor
Terminated 50
Source
1.28
nV/
√Hz
Equivalent Power in 50
500 MHz Bandwidth
–78
dBm
Input Resistance
From INHI to INLO
800
1000
1200
Input Capacitance
From INHI to INLO
2.5
pF
DC Bias Voltage
Either Input
1.725
V
LIMITING AMPLIFIER
(Outputs LMHI, LMLO)
Usable Frequency Range
5
500
MHz
At Limiter Output
RLOAD = RLIM = 50
to –10 dB Point
875
MHz
Phase Variation at 100 MHz
Over Input Range –60 dBm to +10 dBm
±3
Degrees
Limiter Output Current
Nominally 400 mV/RLIM
0110
mA
Versus Temperature –40
°C ≤ T
A
≤ +85°C
–0.008
%/
°C
Input Range
3
–78
+9
dBV
Equivalent dBm
–65
+22
dBm
Maximum Output Voltage
At Either LMHI or LMLO, wrt VPS2
1
1.25
V
Rise/Fall Time (10%–90%)
RLOAD
≤ 50 , 40 ≤ R
LIM
≤ 400
0.4
ns
LOGARITHMIC AMPLIFIER
(Output VLOG)
±3 dB Error Dynamic Range
From Noise Floor to Maximum Input
100
dB
Transfer Slope
5 MHz
≤ f ≤ 200 MHz
18
20
22
mV/dB
Over Temperature –40
°C < T
A < +85
°C
17
20
23
mV/dB
Intercept (Log Offset)
5 MHz
≤ f ≤ 200 MHz
–116
–108
–100
dBV
Equivalent dBm (re 50
)
–103
–95
–87
dBm
Over Temperature –40
°C ≤ T
A
≤ +85°C
–117
–108
–99
dBV
Equivalent dBm (re 50
)
–104
–95
–86
dBm
Temperature Sensitivity
–0.009
dB/
°C
Linearity Error (Ripple)
Input from –83 dBV (–70 dBm) to +7 dBV (+20 dBm)
±0.4
dB
Output Voltage
Input = –91 dBV (–78 dBm) VS = +5 V, +2.7 V
0.34
V
Input = +9 dBV (+22 dBm) VS = +5 V
2.34
2.75
V
Input = +9 dBV (+22 dBm) VS = +2.75 V
2.10
V
Minimum Load Resistance, RL
40
50
Maximum Sink Current
To Ground
0.75
1.0
1.25
mA
Output Resistance
0.3
Small-Signal Bandwidth
3.5
MHz
Output Settling Time to 1%
Large Scale Input, +3 dBV (+16 dBm),
RL
≥ 50 , C
L
≤ 100 pF
120
220
ns
Rise/Fall Time (10%–90%)
Large Scale Input, +3 dBV (+16 dBm),
RL ≥ 50 , CL ≤ 100 pF
67
100
ns
POWER INTERFACES
Supply Voltage, VPOS
2.7
5
6.5
V
Quiescent Current
Zero-Signal, LMDR Open
13
16
20
mA
Over Temperature
–40
°C < T
A < +85
°C
111623
mA
Disable Current
–40
°C < T
A < +85°C
0.01
4
A
Additional Bias for Limiter
RLIM = 400
(See Text)
1.4
1.6
mA
Logic Level to Enable Power
HI Condition, –40
°C < T
A < +85
°C
1.8
VPOS
V
Input Current when HI
3 V at ENBL, –40
°C < T
A < +85°C40
60
A
Logic Level to Disable Power
LO Condition, –40
°C < T
A < +85
°C
–0.5
1
V
NOTES
1Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
2The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50
termination corresponds to an input of 0.2236 V rms. Hence, the relationship between dBV and dBm is a fixed
offset of +13 dBm in the special case of a 50
termination.
3Due to the extremely high Gain Bandwidth Product of the AD8309, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50
).
Specifications subject to change without notice.
(VS = +5 V, TA = +25 C, unless otherwise noted)
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