參數(shù)資料
型號: AD8305ACPZ-R2
廠商: Analog Devices Inc
文件頁數(shù): 20/24頁
文件大?。?/td> 0K
描述: IC AMP LOG CONV 100DB 16-LFCSP
設計資源: Interfacing ADL5315 to Translinear Logarithmic Amplifier (CN0056)
Interfacing ADL5317 High Side Current Mirror to a Translinear Logarithmic Amplifier in an Avalanche Photodiode Power Detector
標準包裝: 250
類型: 對數(shù)轉(zhuǎn)換器
應用: 光纖
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,CSP
供應商設備封裝: 16-LFCSP-VQ
包裝: 帶卷 (TR)
AD8305
Rev. B | Page 5 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8305
12 VOUT
NOTES
1. CONNECT EPAD TO GROUND.
11 SCAL
10 BFIN
9 VLOG
VRDZ 1
VREF 2
IREF 3
VSU
M
5
VN
EG
6
VN
EG
7
VPO
S
8
INPT 4
16
CO
M
15
CO
M
14
CO
M
13
CO
M
PIN 1
INDICATOR
TOP VIEW
(Not to Scale)
03
05
3-
0
02
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Function
1
VRDZ
Top of a Resistive Divider Network that Offsets VLOG to Position the Intercept. Normally connected to VREF;
may also be connected to ground when bipolar outputs are to be provided.
2
VREF
Reference Output Voltage of 2.5 V.
3
IREF
Accepts (Sinks) Reference Current, IREF.
4
INPT
Accepts (Sinks) Photodiode Current, IPD. Usually connected to photodiode anode such that photo current
flows into INPT.
5
VSUM
Guard Pin. Used to shield the INPT current line and for optional adjustment of the INPT and IREF node
potential.
6, 7
VNEG
Optional Negative Supply, VN (this pin is usually grounded; for details of usage, see the Applications section.
8
VPOS
Positive Supply, (VP VN ) ≤ 12 V.
9
VLOG
Output of the Logarithmic Front End.
10
BFIN
Buffer Amplifier Noninverting Input.
11
SCAL
Buffer Amplifier Inverting Input.
12
VOUT
Buffer Output.
13 to 16
COMM
Analog Ground.
EPAD
The exposed pad must be soldered to ground.
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