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參數(shù)資料
| 型號(hào)： | AD8300AN |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12-BIT SERIAL 8-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 設(shè)置時(shí)間： | 14µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 5.1mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電壓，單極 |
| 采樣率（每秒）： | 71k |
REV. A
AD8300
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8300 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
*
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
Logic Inputs to GND . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
VOUT to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
IOUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package Power Dissipation . . . . . . . . . . . . . (TJ Max – TA)/
θ
JA
Thermal Resistance
θ
JA
8-Lead Plastic DIP Package (N-8) . . . . . . . . . . . . . 103
°C/W
8-Lead SOIC Package (SO-8) . . . . . . . . . . . . . . . . 158
°C/W
Maximum Junction Temperature (TJ Max) . . . . . . . . . . 150
°C
Operating Temperature Range . . . . . . . . . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATIONS
SO-8
Plastic DIP
1
2
3
4
TOP VIEW
(Not to Scale)
8
7
6
5
AD8300
VDD
CS
CLK
SDI
VOUT
GND
LD
CLR
1
4
8
5
ORDERING GUIDE
Package
Model
INL
Temp
Description
Options
AD8300AN
±2
XIND
8-Lead P-DIP
N-8
AD8300AR
±2
XIND
8-Lead SOIC
SO-8
NOTES
XIND = –40
°C to +85°C.
The AD8300 contains 630 transistors. The die size measures 72 mil
× 65 mil.
PIN DESCRIPTIONS
Pin #
Name
Function
1VDD
Positive power supply input. Specified range
of operation +2.7 V to +5.5 V.
2
CS
Chip Select, active low input. Disables shift
register loading when high. Does not affect
LD operation.
3
CLK
Clock input, positive edge clocks data into
shift register.
4
SDI
Serial Data Input, input data loads directly
into the shift register, MSB first.
5
LD
Load DAC register strobes, active low.
Transfers shift register data to DAC register.
See Truth Table I for operation. Asynchro-
nous active low input.
6
CLR
Resets DAC register to zero condition.
Asynchronous active low input.
7
GND
Analog and Digital Ground.
8VOUT
DAC voltage output, 2.0475 V full scale
with 0.5 mV per bit. An internal tempera-
ture stabilized reference maintains a fixed
full-scale voltage independent of time, tem-
perature and power supply variations.
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SDI
tCSS
tLD1
tCSH
tLD2
CLK
CS
LD
SDI
CLK
CLR
LD
1LSB
ERROR BAND
FS
ZS
tDS
tDH
tCL
tCH
tLDW
tS
tCLRW
tS
VOUT
Figure 3. Timing Diagram
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