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| 型號： | AD8264ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VGA DIFF QUAD LN 40LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 可變增益 |
| 電路數(shù)： | 4 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 380 V/µs |
| -3db帶寬： | 235MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電流 - 電源： | 99mA |
| 電壓 - 電源，單路/雙路(±)： | ±2.5 V ~ 5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
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AD8264
Rev. A | Page 30 of 40
APPLICATIONS INFORMATION
A LOW CHANNEL COUNT APPLICATION CONCEPT
USING A DISCRETE REFERENCE
The AD8264 is particularly well suited for use in the analog
front end of medical PET imaging systems. Figure 112 shows
how the AD8264 may be used with the AD5314 (a 4-channel,
ADC, respectively). The DAC sets the gain of the AD8264. Note
that the full gain span of 24 dB is achieved with this setup because
the gain control input range of the AD8264 is very close to 1.25 V.
The GNLO pin must offset by 1.25/2 = 625 mV because the
gain control input is bipolar around the voltage applied at GNLO.
This is done with two 1 k, 1% resistors. The approximately 1 A
of bias current flowing from the GNLO pin does not contribute
a significant error because the basic gain error of the AD8264 is
the limiting factor.
The ADR127 1.25 V precision reference with an input of 3.3 V
can supply 2 mA to +5 mA from 40°C to +125°C, which is
sufficient to drive both the resistive divider and the REFIN pin
of the AD5314. The AD5314 is based on the string DAC concept,
which means that the REFIN pin looks like a resistor that is
nominally 45 k; this results in a current draw of 1.25V/45 k =
28 A. Even at the lowest specified resistance of 37 k, this is
still only a current of 34 A. Therefore, the total current draw from
the ADR127 is the 625 A of the resistive divider plus ~30 A,
which equals ~655 A, well below the 5 mA maximum current.
Figure 112 also includes the DAC output equation, which
indicates that the output can vary between 0 V and VREF = 1.25 V.
The output of the AD8264 is ideal to drive an ADC like the 1.8 V
quad-channel AD9228. If eight channels are needed, two AD8264s
with the octal AD9222 ADC achieve the same thing. The same
resistive divider can be used for two AD8264s because the bias
current flowing is now ~2 A, but this still only introduces an
error of 1 mV with ideally matched resistors. With 20 dB/V gain
scaling, this is a gain error of only 0.02 dB, which is much
smaller than the fundamental gain error of the AD8264
(typically ~0.2 dB).
The single-ended-to-differential amplifier of the AD8264
amplifies the VGA output signal by 6 dB and can provide the
The ADC is connected with the default internal reference because
the SENSE pin is grounded. With this connection, the AD9222/
AD9228 VREF pin is an output that provides 1 V; this is then
connected to the VOCM input of the AD8264, which sets the
output common-mode voltage of the VOHx and VOLx pins to
1 V. This voltage is very close to the recommended optimal value of
VDD/2 = 0.9 V. With this configuration, the ADC inputs are set
to a full-scale (FS) of 2 V p-p.
Note that the ADC VREF should not drive many loads; therefore,
for multiple AD8264s, the VREF should be buffered.
+3.3V
–3.3V
0.1F
NC 6
NC 5
VOUT 4
1
2
3
NC
GND
VIN
ADR127
REFIN
VOUTA
VOUTB
VOUTC
VOUTD
DAC
AD5314
GND
VREFIN × D
VOUT
2N
=
10F
1k
1%
1k
1%
1.25V
625mV
GNH1
GNH2
GNH3
GNH4
AD8264
GNLO
VOUT RANGE = 0V TO 1.25V
EACH
VOCM
VOHx VOLx
VDD
RFILT
CFILT
ADC
AD9222/
AD9228
VREF
VDD
+1.8V
SENSE
GND
VIN – x
VIN + x
SENSE GROUNDED: VREF = 1V
VNEG
VPOS
IPPx
RS
RTERM
OFSx
~250nA EACH
VGAx
VGA OUTPUTS TO OTHER
SIGNAL PROCESSING
OUTPUT COMMON-MODE VOLTAGE = 1V
VOHx = 1V, VOLx = 1V; VOFS = 0V
FS = 2V p-p
625
A
1F
0.1F
~
1
A
+3.3V
07736-
082
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