參數(shù)資料
型號: AD8260ACPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 14/32頁
文件大?。?/td> 0K
描述: IC AMP VGA DIFF LN 310MA 32LFCSP
標(biāo)準(zhǔn)包裝: 5,000
放大器類型: 可變增益
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 730 V/µs
-3db帶寬: 195MHz
電流 - 輸入偏壓: 200nA
電流 - 電源: 28.3mA
電流 - 輸出 / 通道: 310mA
電壓 - 電源,單路/雙路(±): 3.3 V ~ 10 V,±3.3 V ~ 5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
配用: AD8260-EVALZ-ND - BOARD EVAL FOR AD8260
AD8260
Rev. A | Page 21 of 32
32
2
3
6
31
30
1.5k
1k
29
27
26
25
1k
1.5k
GM
9
24
23
22
21
VMID
4
×1
1
AD8260
VMDO
TXEN
VMDI
VNCM
VPSB
ENBL
VGAP
VGAN
V
NG
R
VPSR
G
NS
3
G
NS
2
G
NS
1
G
NS
0
P
RAO
V
NG
R
VOCM
INPP
INRP
INRN
INP
N
TX
FB
VN
EG
VN
EG
TXOP
VPOS
VPSR
VMDO
PRAI
FDBK
07192-
053
50
0.1F
0V, 1.8V/3.3V
5
3.3V
7
8
0.1F
1.8V OR 3.3V
ADC
FS INPUT
2V p-p
INP
INN
10
3.3V
11
12
13
14
16
15
17
18
19
RFB1
100
RFB2
100
0.1F
20
3.3V
0.1F
POWERLINE
CABLE, ETC.
OPTIONAL CLAMP DIODES
AND SNUBBING RESISTORS
0.1F
50
1.8V OR 3.3V
20mA DAC
1V MAX WITH
200mA pk
BIAS
ATTENUATOR
GM STAGES
LOGIC
28
CFB
OPTIONAL USER SELECTED
CFB REDUCES HF PEAKING
WITH CAPACITIVE LOADING
LOW-PASS
AA FILTER
+
Figure 64. Block Diagram and Basic Application Connections
HIGH CURRENT DRIVER AMPLIFIER
The high current driver amplifier can deliver very large output
currents suitable for driving complex impedances, such as a
power line, a 50 Ω line, or a coaxial cable. The input of the
amplifier is fully differential and intended to be driven by a
differential current-output DAC, as shown in Figure 64. The
differential input signal is amplified by 1.5× and produces a
2.25 V p-p single-ended output signal from a 1.5 V p-p input
signal. A DAC with 15 mA maximum output current into a
50 load provides 1.5 V p-p of input voltage and results in
2.25 V p-p at the output. A DAC whose output is 20 mA produces
an output swing of 3 V p-p (neglecting a small gain error when
driving the parallel combination of the 50 load-resistor and the
internal 1 k gain resistor of the AD8260).
For a 3.3 V supply rail, the maximum limit of the output voltage
is 3 V p-p and distorts severely if exceeded. The recommended
output for optimum distortion is 2 V p-p for a 3.3 V supply.
Correspondingly, larger output swings are accommodated for
higher supply voltages such as +5 V or ±5 V.
For optimum distortion, the input drive must be controlled
such that the output swing is well within saturation levels
established by the supply rail. The output swing can be reduced
by using load resistors with values less than 50 Ω or by reducing
the amplifier gain by connecting external resistors in parallel
with the internal 1 k and 1.5 k resistors between Pin 27,
Pin 28, and Pin 29, and between Pin 30, Pin 31, and Pin 32.
Coincidently, noise is reduced because the gain setting resistors
are the primary noise sources of the high current driver amplifier.
The output-referred noise is 14 nV/√Hz, of which 11 nV/√Hz is
due to the gain setting resistors. Matching of the gain setting
resistors is important for good common-mode rejection and the
accuracy of the differential gain. If external resistors are used,
their accuracy should be at least ±1%. How low the resistor
values can be is primarily determined by the quality of the ac
ground at Pin VOCM; as the gain setting resistors decrease in
value, the dynamic current increases, and the quality of the
decoupling capacitors needs to increase correspondingly.
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