參數(shù)資料
型號: AD8253ARMZ
廠商: Analog Devices Inc
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC AMP INST ICMOS LDRIFT 10MSOP
標(biāo)準(zhǔn)包裝: 50
系列: iCMOS®
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 20 V/µs
-3db帶寬: 10MHz
電流 - 輸入偏壓: 5nA
電壓 - 輸入偏移: 150µV
電流 - 電源: 4.6mA
電流 - 輸出 / 通道: 37mA
電壓 - 電源,單路/雙路(±): ±5 V ~ 15 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
Data Sheet
AD8253
Rev. B | Page 19 of 24
REFERENCE TERMINAL
The reference terminal, REF, is at one end of a 10 kΩ resistor
(see Figure 51). The instrumentation amplifier output is
referenced to the voltage on the REF terminal; this is useful
when the output signal needs to be offset to voltages other than
its local analog ground. For example, a voltage source can be
tied to the REF pin to level shift the output so that the AD8253
can interface with a single-supply ADC. The allowable reference
voltage range is a function of the gain, common-mode input,
and supply voltages. The REF pin should not exceed either +VS
or VS by more than 0.5 V.
For best performance, especially in cases where the output is
not measured with respect to the REF terminal, source imped-
ance to the REF terminal should be kept low because parasitic
resistance can adversely affect CMRR and gain accuracy.
INCORRECT
AD8253
VREF
CORRECT
AD8253
OP1177
+
VREF
0
698
3-
0
56
Figure 57. Driving the Reference Pin
COMMON-MODE INPUT VOLTAGE RANGE
The 3-op-amp architecture of the AD8253 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8253 experience a combination of both the gained
signal and the common-mode signal. This combined signal can
be limited by the voltage supplies even when the individual
input and output signals are not. Figure 28 and Figure 29 show
the allowable common-mode input voltage ranges for various
output voltages, supply voltages, and gains.
LAYOUT
Grounding
In mixed-signal circuits, low level analog signals need to be
isolated from the noisy digital environment. Designing with the
AD8253 is no exception. Its supply voltages are referenced to an
analog ground. Its digital circuit is referenced to a digital ground.
Although it is convenient to tie both grounds to a single ground
plane, the current traveling through the ground wires and PC
board can cause an error. Therefore, use separate analog and
digital ground planes. Only at one point, star ground, should
analog and digital ground meet.
The output voltage of the AD8253 develops with respect to the
potential on the reference terminal. Take care to tie REF to the
appropriate local analog ground or to connect it to a voltage that
is referenced to the local analog ground.
Coupling Noise
To prevent coupling noise onto the AD8253, follow these
guidelines:
Do not run digital lines under the device.
Run the analog ground plane under the AD8253.
Shield fast-switching signals with digital ground to avoid
radiating noise to other sections of the board, and never
run them near analog signal paths.
Avoid crossover of digital and analog signals.
Connect digital and analog ground at one point only
(typically under the ADC).
Power supply lines should use large traces to ensure a low
impedance path. Decoupling is necessary; follow the
guidelines listed in the Power Supply Regulation and
Bypassing section.
Common-Mode Rejection
The AD8253 has high CMRR over frequency, giving it greater
immunity to disturbances, such as line noise and its associated
harmonics, in contrast to typical in amps whose CMRR falls off
around 200 Hz. They often need common-mode filters at the
inputs to compensate for this shortcoming. The AD8253 is able
to reject CMRR over a greater frequency range, reducing the
need for input common-mode filtering.
Careful board layout maximizes system performance. To maintain
high CMRR over frequency, lay out the input traces symmetrically.
Ensure that the traces maintain resistive and capacitive balance;
this holds for additional PCB metal layers under the input pins
and traces. Source resistance and capacitance should be placed
as close to the inputs as possible. Should a trace cross the inputs
(from another layer), it should be routed perpendicular to the
input traces.
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
can appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass RC network placed at the input
of the instrumentation amplifier, as shown in Figure 58. The
filter limits the input signal bandwidth according to the following
relationship:
)
C
(
R
1
FilterFreq
C
D
DIFF
2
π
2
C
CM
RC
1
FilterFreq
π
2
where CD ≥ 10 CC.
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