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參數(shù)資料
| 型號： | AD8250ARMZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP INST ICMOS LDRIFT 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | iCMOS® |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 輸出類型： | 推挽式 |
| 轉(zhuǎn)換速率： | 25 V/µs |
| -3db帶寬： | 10MHz |
| 電流 - 輸入偏壓： | 5nA |
| 電壓 - 輸入偏移： | 70µV |
| 電流 - 電源： | 4.1mA |
| 電流 - 輸出 / 通道： | 37mA |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 30 V，±5 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | AD8250-EVALZ-ND - BOARD EVALUATION AD8250 |
Data Sheet
AD8250
Rev. C | Page 15 of 24
THEORY OF OPERATION
10k
REF
OUT
A3
–IN
+IN
WR
2.2k
+VS
–VS
+VS
–VS
+VS
–VS
A1
A0
2.2k
DGND
A1
A2
DIGITAL
GAIN
CONTROL
2.2k
+VS
–VS
+VS
–VS
+VS
–VS
+VS
–VS
0
62
88
-0
54
Figure 47. Simplified Schematic
The AD8250 is a monolithic instrumentation amplifier based
on the classic, 3-op-amp topology as shown in Figure 47. It is
fabricated on the Analog Devices, Inc., proprietary iCMOS
process that provides precision, linear performance, and a
robust digital interface. A parallel interface allows users to
digitally program gains of 1, 2, 5, and 10. Gain control is achieved
by switching resistors in an internal, precision resistor array (as
shown in Figure 47). Although the AD8250 has a voltage feedback
topology, the gain bandwidth product increases for gains of 1, 2,
and 5 because each gain has its own frequency compensation.
This results in maximum bandwidth at higher gains.
All internal amplifiers employ distortion cancellation circuitry
and achieve high linearity and ultralow THD. Laser trimmed
resistors allow for a maximum gain error of less than 0.03%
for G = 1 and minimum CMRR of 98 dB for G = 10. A pinout
optimized for high CMRR over frequency enables the AD8250
to offer a guaranteed minimum CMRR over frequency of 80 dB
at 50 kHz (G = 1). The balanced input reduces the parasitics
that, in the past, adversely affected CMRR performance.
GAIN SELECTION
Logic low and logic high voltage limits are listed in the
Specifications section. Typically, logic low is 0 V and logic high
is 5 V; both voltages are measured with respect to DGND. See
Table 2 for the permissible voltage range of DGND. The gain of
the AD8250 can be set using two methods.
Transparent Gain Mode
The easiest way to set the gain is to program it directly via a
logic high or logic low voltage applied to A0 and A1. Figure 48
shows an example of this gain setting method, referred to through-
out the data sheet as transparent gain mode. Tie WR to the negative
supply to engage transparent gain mode. In this mode, any change
in voltage applied to A0 and A1 from logic low to logic high, or
vice versa, immediately results in a gain change. Table 5 is the
truth table for transparent gain mode, and Figure 48 shows the
AD8250 configured in transparent gain mode.
+15V
–15V
A0
A1
WR
+IN
+5V
–IN
10μF0.1F
G = 10
DGND
REF
AD8250
06
28
8-
0
55
NOTE:
1. IN TRANSPARENT GAIN MODE, WR IS TIED TO VS.
THE VOLTAGE LEVELS ON A0 AND A1 DETERMINE
THE GAIN. IN THIS EXAMPLE, BOTH A0 AND A1 ARE
SET TO LOGIC HIGH, RESULTING IN A GAIN OF 10.
Figure 48. Transparent Gain Mode, A0 and A1 = High, G = 10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8250ARZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250ARZ-R7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250ARZ-RL | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250-EVALZ | 功能描述:BOARD EVALUATION AD8250 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 運(yùn)算放大器 系列:iCMOS® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- |
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