- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗6027 > AD8228BRMZ-R7 (Analog Devices Inc)IC AMP INST PREC LDRIFT LN 8MSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD8228BRMZ-R7 |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 8/24闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC AMP INST PREC LDRIFT LN 8MSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Current Sense Amplifiers Instrumentation Amplifiers Performance |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 鍎€琛� |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 2.5 V/µs |
| -3db甯跺锛� | 650kHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 400pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 50µV |
| 闆绘祦 - 闆绘簮锛� | 850µA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 18mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 4.6 V ~ 36 V锛�±2.3 V ~ 18 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-MSOP |
| 鍖呰锛� | 妯�(bi膩o)婧�(zh菙n)鍖呰 |
| 鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 | 771 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | AD8228BRMZ-R7DKR |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)鐣�(d膩ng)鍓嶇8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)
AD8228
Rev. 0 | Page 16 of 24
THEORY OF OPERATION
C1
C2
I
IB COMPENSATION
VBIAS
A1
A2
A3
R4
489
G1 G2
GAIN
SET
R3
4.889k
R2
22k
R1
22k
V1
V2
+VS
鈥揤S
+VS
鈥揤S
Q1
Q2
600
鈥揤S
鈥揑N
+VS
600
鈥揤S
+IN
+VS
鈥揤S
10k
+VS
鈥揤S
OUTPUT
REF
07
03
5-
01
8
Figure 41. Simplified Schematic
ARCHITECTURE
The AD8228 is based on the classic three op amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage. Figure 41 shows a simplified schematic
of the AD8228.
The first stage is composed of the A1 and A2 amplifiers, the Q1
and Q2 input transistors, and the R1 through R4 resistors. The
feedback loop of A1, R1, and Q1 ensures that the V1 voltage is
a constant diode drop below in the negative input voltage.
Similarly, V2 is kept a constant diode drop below the positive
input. Therefore, a replica of the differential input voltage is
placed across either R3 (when the gain pins are left open) or
R3||R4 (when the gain pins are shorted). The current that flows
across this resistance must also flow through the R1 and R2
resistors, creating a gained differential signal between the A2
and A1 outputs. Note that, in addition to a gained differential
signal, the original common-mode signal, shifted a diode drop
down, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 10 k惟 resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The AD8228 does not depend on external resistors. Much of the
dc performance of precision circuits depends on the accuracy and
matching of resistors. The resistors on the AD8228 are laid out to
be tightly matched. The resistors of each part are laser trimmed
and tested for their matching accuracy. Because of this trimming
and testing, the AD8228 can guarantee high accuracy for speci-
fications such as gain drift, common-mode rejection (CMRR),
and gain error.
SETTING THE GAIN
The AD8228 can be configured for a gain of 10 or 100 with no
external components. Leave Pin 2 and Pin 3 open for a gain of 10;
short Pin 2 and Pin 3 together for a gain of 100 (see Figure 42).
07
03
5
-00
3
AD8228
1
2
3
4
8
5
6
7
+VS
鈥揤S
REF
鈥揑N
+IN
AD8228
1
2
3
4
8
5
6
7
+VS
鈥揤S
REF
VOUT
鈥揑N
+IN
G = 10
PIN 2 AND PIN 3 OPEN
G = 100
PIN 2 AND PIN 3 SHORTED
Figure 42. Setting the Gain
The transfer function with Pin 2 and Pin 3 open is
VOUT = 10 脳 (VIN+ VIN) + VREF
The transfer function with Pin 2 and Pin 3 shorted is
VOUT = 100 脳 (VIN+ VIN) + VREF
COMMON-MODE INPUT VOLTAGE RANGE
The three op amp architecture of the AD8228 applies gain and
then removes the common-mode voltage. Therefore, internal
nodes in the AD8228 experience a combination of both the
gained signal and the common-mode signal. This combined
signal can be limited by the voltage supplies even when the
individual input and output signals are not. Figure 10 through
Figure 13 show the allowable common-mode input voltage
ranges for various output voltages and supply voltages.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| RMCF0603JT1K00 | RES 1K OHM 1/10W 5% 0603 SMD |
| AD843KNZ | IC OPAMP GP 34MHZ 50MA 8DIP |
| AMP04FSZ | IC AMP INST PREC 30MA LP 8SOIC |
| OP400HPZ | IC OPAMP GP 500KHZ QUAD LP 14DIP |
| AD843JNZ | IC OPAMP GP 34MHZ 50MA 8DIP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AD8228BRMZ-RL | 鍔熻兘鎻忚堪:IC AMP INST PREC LDRIFT LN 8MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:30pA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:200µA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢 |
| AD8228BRZ | 鍔熻兘鎻忚堪:IC AMP INST PREC LDRIFT LN 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:0.6 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:45nA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:40mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 32 V锛�±1.5 V ~ 16 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD8228BRZ-R7 | 鍔熻兘鎻忚堪:IC AMP INST PREC LDRIFT LN 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:150 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:闊抽牷 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:5 V/µs 澧炵泭甯跺绌�:12MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:100nA 闆诲 - 杓稿叆鍋忕Щ:500µV 闆绘祦 - 闆绘簮:6mA 闆绘祦 - 杓稿嚭 / 閫氶亾:50mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):4 V ~ 32 V锛�±2 V ~ 16 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TSSOP 鍖呰:绠′欢 |
| AD8228BRZ-RL | 鍔熻兘鎻忚堪:IC AMP INST PREC LDRIFT LN 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:30pA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:200µA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢 |
| AD8229 | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:1nV/鈭欻z Low Noise 210掳C Instrumentation Amplifier |
鐧�(f膩)甯冪穵鎬ラ噰璩�(g貌u)锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
