+VS +IN 鈥揑N 鈥揤
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AD8222ACPZ-WP
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 7/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC AMP INST DUAL PREC LN 16LFCSP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 64
鏀惧ぇ鍣ㄩ鍨嬶細 鍎€琛�
闆昏矾鏁�(sh霉)锛� 2
杞�(zhu菐n)鎻涢€熺巼锛� 2 V/µs
-3db甯跺锛� 1.2MHz
闆绘祦 - 杓稿叆鍋忓锛� 500pA
闆诲 - 杓稿叆鍋忕Щ锛� 120µV
闆绘祦 - 闆绘簮锛� 900µA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 18mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 4.6 V ~ 36 V锛�±2.3 V ~ 18 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 16-VQFN 瑁搁湶鐒婄洡锛孋SP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 16-LFCSP-VQ
鍖呰锛� 鎵樼洡 - 鏅剁矑
AD8222
Rev. A | Page 15 of 24
THEORY OF OPERATION
C1
C2
+VS
+IN
鈥揑N
鈥揤S
10k
400
10k
REF
OUTPUT
IB COMPENSATION
+VS
鈥揤S
+VS
鈥揤S
+VS
VB
II
R1 24.7k
24.7k
RG
Q1
R2
Q2
鈥揤S
+VS
鈥揤S
+VS
A2
A1
A3
05
94
7-
0
45
Figure 44. Simplified Schematic
AMPLIFIER ARCHITECTURE
The two instrumentation amplifiers of the AD8222 are based
on the classic 3-op-amp topology. Figure 44 shows a simplified
schematic of one of the amplifiers. The input transistors, Q1
and Q2, are biased at a fixed current. Any differential input
signal forces the output voltages of A1 and A2 to change so that
the differential voltage also appears across RG. The current that
flows through RG must also flow through R1 and R2, resulting
in a precisely amplified version of the differential input signal
between the outputs of A1 and A2. Topologically, Q1 + A1 + R1
and Q2 + A2 + R2 can be viewed as precision current feedback
amplifiers. The common-mode signal and the amplified differen-
tial signal are applied to a difference amplifier that rejects the
common-mode voltage. The difference amplifier employs innova-
tions that result in low output offset voltage as well as low output
offset voltage drift.
Because the input amplifiers employ a current feedback architec-
ture, the gain-bandwidth product of the AD8222 increases
with gain, resulting in a system that does not suffer from the
expected bandwidth loss of voltage feedback architectures at
higher gains.
The transfer function of the AD8222 is
VOUT = G(V+IN VIN) + VREF
where:
G
R
G
k惟
49.4
1
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8222, which can be calculated by referring to Table 8 or by
using the following gain equation:
1
k惟
49.4
G
R
G
Table 8. Gains Achieved Using 1% Resistors
1% Standard Table Value of RG (惟)
Calculated Gain
49.9 k
1.990
12.4 k
4.984
5.49 k
9.998
2.61 k
19.93
1.00 k
50.40
499
100.0
249
199.4
100
495.0
49.9
991.0
The AD8222 defaults to G = 1 when no gain resistor is used.
The tolerance and gain drift of the RG resistor should be added
to the AD8222鈥檚 specifications to determine the total gain
accuracy of the system. When the gain resistor is not used,
gain error and gain drift are kept to a minimum.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
1-1586587-2 12P VAL-U-LOK BMI VRTHDR V0
3793-6202 CONN HEADER 10PS STR SHORT LATCH
3793-1003 CONN HEADER 10POS R/A NO LATCH
1-1586587-0 10P VAL-U-LOK BMI VRTHDR V0
1586587-8 8P VAL-U-LOK BMI VRT HDR V0
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
AD8222BCPZ-R7 鍔熻兘鎻忚堪:IC AMP INST DUAL PREC LN 16LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:0.6 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:45nA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:40mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 32 V锛�±1.5 V ~ 16 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:LM324ADTBR2G-NDLM324ADTBR2GOSTR
AD8222BCPZ-RL 鍔熻兘鎻忚堪:IC AMP INST DUAL PREC LN 16LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:30pA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:200µA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢
AD8222BCPZ-WP 鍔熻兘鎻忚堪:IC AMP INST DUAL PREC LN 16LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:0.028 V/µs 澧炵泭甯跺绌�:105kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:3nA 闆诲 - 杓稿叆鍋忕Щ:100µV 闆绘祦 - 闆绘簮:3.3µA 闆绘祦 - 杓稿嚭 / 閫氶亾:12mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2.7 V ~ 12 V锛�±1.35 V ~ 6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:鍓垏甯� (CT) 鍏跺畠鍚嶇ū:OP481GRUZ-REELCT
AD8222-EVAL 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Precision, Dual-Channel Instrumentation Amplifier
AD8222-EVALZ 鍔熻兘鎻忚堪:BOARD EVALUATION FOR AD8222 RoHS:鏄� 椤炲垾:绶ㄧ▼鍣紝闁嬬櫦(f膩)绯荤当(t菕ng) >> 瑭�(p铆ng)浼版澘 - 閬�(y霉n)绠楁斁澶у櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:-
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣闇€姹�

(鑻ュ彧閲囪臣涓€姊濆瀷铏�(h脿o)锛屽～瀵竴琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�(t谩i)锛屾煡鐪嬪牨(b脿o)鍍�(ji脿)

*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

*
*
*
    • 鎴�
    • 閲囪喘
    • 鎼滅储
    • 浼氬憳