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| 型號： | AD8222-EVALZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD8222 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 每 IC 通道數(shù)： | 2 - 雙 |
| 放大器類型： | 儀表 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| -3db帶寬： | 1.2MHz |
| 電流 - 輸出 / 通道： | 18mA |
| 工作溫度： | -40°C ~ 85°C |
| 電流供應(yīng)（主 IC）： | 900µA |
| 電壓 - 電源，單路/雙路(±)： | 4.6 V ~ 36 V，±2.3 V ~ 18 V |
| 板類型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD8222 |
AD8222
Rev. A | Page 18 of 24
INPUT PROTECTION
All terminals of the AD8222 are protected against ESD (1 kV,
human body model). In addition, the input structure allows for
dc overload conditions of about 2.5 V beyond the supplies.
Input Voltages Beyond the Rails
For larger input voltages, an external resistor should be used in
series with each input to limit current during overload conditions.
The AD8222 can safely handle a continuous 6 mA current. The
limiting resistor can be computed from
Ω
400
mA
6
SUPPLY
IN
LIMIT
V
R
For applications in which the AD8222 encounters extreme over-
load voltages, such as cardiac defibrillators, external series
resistors and low leakage diode clamps, such as the BAV199L,
the FJH1100, or the SP720, should be used.
Differential Input Voltages at High Gains
When operating at high gain, large differential input voltages
can cause more than 6 mA of current to flow into the inputs.
This condition occurs when the differential voltage exceeds
the following critical voltage:
VCRITICAL = (400 + RG) × (6 mA)
This is true for differential voltages of either polarity.
The maximum allowed differential voltage can be increased by
adding an input protection resistor in series with each input.
The value of each protection resistor should be
RPROTECT = (VDIFF_MAX VCRITICAL)/6 mA
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
can appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass, RC network placed at the input
of the instrumentation amplifier, as shown in Figure 48. The
filter limits the input signal bandwidth according to the
following relationship:
)
(2
2
1
C
D
Diff
C
R
FilterFreq
C
CM
C
R
FilterFreq
2
1
where CD ≥ 10CC.
R
AD8222
+15V
+IN
–IN
0.1F
10F
0.1F
REF
VOUT
–15V
R1
499
CD
10nF
CC
1nF
CC
1nF
4.02k
05
94
7-
04
8
Figure 48. RFI Suppression
Figure 48 shows an example where the differential filter fre-
quency is approximately 2 kHz, and the common-mode filter
frequency is approximately 40 kHz.
Values of R and CC should be chosen to minimize RFI. Mismatch
between the R × CC at the positive input and the R × CC at
negative input degrades the CMRR of the AD8222. By using a
value of CD 10× larger than the value of CC, the effect of the
mismatch is reduced and performance is improved.
COMMON-MODE INPUT VOLTAGE RANGE
The 3-op-amp architecture of the AD8222 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8222 experience a combination of both the gained
signal and the common-mode signal. This combined signal can
be limited by the voltage supplies even when the individual
input and output signals are not. Figure 7 and Figure 8 show the
allowable common-mode input voltage ranges for various
output voltages, supply voltages, and gains.
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