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參數(shù)資料
| 型號： | AD8209WBRMZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP DIFF PREC 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 1 V/µs |
| 增益帶寬積： | 80kHz |
| 電流 - 輸入偏壓： | 50nA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 1.6mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
Data Sheet
AD8209
Rev. B | Page 13 of 16
4 mA to 20 mA Current Loop Receiver
The AD8209 can also be used in low current-sensing applica-
tions, such as the 4 mA to 20 mA current loop receiver shown
in Figure 28. In such applications, the relatively large shunt
resistor may degrade the common-mode rejection. Adding a
resistor of equal value on the low impedance side of the input
corrects this error.
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8209
5V
BATTERY
10
1%
10
1%
NC = NO CONNECT
08461-
030
CF
OUTPUT
+
–
Figure 28. 4 mA to 20 mA Current Loop Receiver
GAIN ADJUSTMENT
The default gain of the preamplifier and buffer are 7 V/V and
2 V/V, respectively, resulting in a composite gain of 14 V/V. With
the addition of external resistor(s) or trimmer(s), the gain can
be lowered, raised, or finely calibrated.
Gains Less than 14
Because the preamplifier has an output resistance of 100 k, an
external resistor connected from Pin 3 and Pin 4 to GND decreases
the gain by the following factor (see Figure 29):
REXT/(100 k + REXT)
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8209
5V
VDIFF
VCM
NC = NO CONNECT
08461-
031
REXT
OUTPUT
GAIN =
14REXT
REXT + 100k
REXT = 100k
GAIN
14 – GAIN
+
–
+
–
Figure 29. Adjusting for Gains Less than 14
The overall bandwidth is unaffected by changes in gain by using
this method, although there may be a small offset voltage due to
the imbalance in source resistances at the input to the buffer. In
many cases, this can be ignored, but if desired, the offset voltage can
be nulled by inserting a resistor in series with Pin 4. The resistor
used should be equal to 100 k minus the parallel sum of REXT
and 100 k. For example, with REXT = 100 k (yielding a composite
gain of 7 V/V), the optional offset nulling resistor is 50 k.
Gains Greater than 14
Connecting a resistor from the output of the buffer amplifier to
its noninverting input, as shown in Figure 30, increases the gain.
The gain is now multiplied by the factor
REXT/(REXT 100 k)
For example, it is doubled for REXT = 200 k. Overall gains as
high as 50 are achievable in this way. Note that the accuracy of
the gain becomes critically dependent on the resistor value at
high gains. In addition, the effective input offset voltage at Pin 1
and Pin 8 (which is about six times the actual offset of A1) limits
the use of the part in high gain, dc-coupled applications.
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8209
5V
VDIFF
VCM
NC = NO CONNECT
08461-
032
REXT
POINT X
(SEE TEXT)
OUTPUT
GAIN =
14REXT
REXT – 100k
REXT = 100k
GAIN
GAIN – 14
+
–
+
–
Figure 30. Adjusting for Gains Greater than 14
A small offset voltage arises from an imbalance in source
resistances and the finite bias currents inherently present at the
input of A2. In most applications, this additional offset error is
comparable to the specified offset range and therefore introduces
negligible skew. However, it can be essentially eliminated by the
addition of a resistor in series with the parallel combination of
is maintained at 100 k. For example, at a gain of 20, when REXT
= 332 k and the parallel combination of REXT and 100 k is
77 k, the series resistor placed at point X is 23 k.
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