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| 型號(hào)： | AD8143ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RECEIVER TRIPLE DIFF 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 接收器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 0/3 |
| 規(guī)程： | 以太網(wǎng) |
| 電源電壓： | 4.5 V ~ 24 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD8143ACPZ-REEL7DKR |
AD8143
Rev. 0 | Page 22 of 24
DRIVING A CAPACITIVE LOAD
The AD8143 typically drives either high impedance loads,
such as crosspoint switch inputs, or doubly terminated coaxial
cables. A gain of 1 is commonly used in the high impedance
case because the 6 dB transmission line termination loss is not
incurred. A gain of 2 is required when driving cables to
compensate for the 6 dB termination loss.
In all cases, the output must drive the parasitic capacitance
of the feedback loop, conservatively estimated to be 2 pF, in
addition to the capacitance presented by the actual load. When
driving a high impedance input, it is recommended that a small
series resistor be used to buffer the input capacitance of the
device being driven. Clearly, the resistor value must be small
enough to preserve the required bandwidth. In the ideal doubly
terminated cable case, the AD8143 output sees a purely resistive
load. In reality, there is some residual capacitance, and this is
buffered by the series termination resistor. Figure 46 illustrates
the high impedance case, and Figure 47 illustrates the cable-
driving case.
05538-
053
RS
CIN
RG
RF
+
–
0.01
μF
0.01
μF
+5V
–5V
FB
REF
VIN
Figure 46. Buffering the Input Capacitance of a High-Z Load
05538-
054
RS
CS
RG
RF
+
–
0.01
μF
0.01
μF
+5V
–5V
FB
REF
VIN
RL
Figure 47. Driving a Doubly Terminated Cable
Small and large signal frequency responses for the High-Z case
with a 40 Ω series resistor and 10 pF load capacitance are shown
in Figure 10 and Figure 13; transient responses for the same
circuit; therefore, the feedback loop capacitance is the dominant
capacitive load. The feedback loop capacitance is present for all
cases, and its effect is included in the data presented in the
Typical Performance Characteristics and Specifications tables.
POWER-DOWN
The power-down feature is intended to be used to reduce power
consumption when a particular device is not in use, and does
not place the output in a High-Z state when asserted. The
power-down feature is asserted when the voltage applied to the
power-down pin drops to approximately 2 V below the positive
supply. The AD8143 is enabled by pulling the power-down pin
to the positive supply.
COMPARATORS
In addition to general-purpose applications, the two on-chip
comparators can be used to receive differential digital information
or to decode video sync pulses from received common-mode
voltages. Built-in hysteresis helps to eliminate false triggers
from noise.
The comparator outputs are not designed to drive transmission
lines. When the signals detected by the comparators are driven
over cables or controlled impedance printed circuit board
traces, the comparator outputs must be fed to a spare logic gate,
FPGA, or other device that is capable of driving signals over
transmission lines.
An internal linear voltage regulator derives power for the
comparators from the positive supply; therefore, the AD8143
must always have a minimum positive supply voltage of 4.5 V.
SYNC PULSE EXTRACTION USING COMPARATORS
The AD8143 is particularly useful in keyboard video mouse
(KVM) applications. KVM networks transmit and receive
computer video signals, which are typically comprised of red,
green, and blue (RGB) video signals and separate horizontal
and vertical sync signals. Because the sync signals are separate
and not embedded in the color signals, it is advantageous to
transmit them using a simple scheme that encodes them among
the three common-mode voltages of the RGB signals. The
AD8134 triple differential driver is a natural complement to the
AD8143 and performs the sync pulse encoding with the
necessary circuitry on-chip.
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