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| 型號(hào)： | AD8133ACPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC OPAMP DIFF TRPL LDIST 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 3 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 1600 V/µs |
| -3db帶寬： | 450MHz |
| 電流 - 輸入偏壓： | 67µA |
| 電壓 - 輸入偏移： | 6000µV |
| 電流 - 電源： | 28mA |
| 電流 - 輸出 / 通道： | 90mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 12 V，±2.25 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
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AD8133
Rev. 0 | Page 13 of 16
CALCULATING AN APPLICATION CIRCUIT’S INPUT
IMPEDANCE
The effective input impedance of a circuit such as that in
being driven by a single-ended or differential signal source. For
balanced differential input signals, the differential input imped-
ance, RIN, dm, between the inputs VIP and VIN is simply
kΩ
1.5
2
=
×
=
G
dm
IN,
R
In the case of a single-ended input signal (for example, if VIN is
grounded and the input signal is applied to VIP), the input
impedance becomes:
()
kΩ
125
.
1
2
1
=
+
×
=
F
G
F
G
dm
IN,
R
The circuit’s input impedance is effectively higher than it would
be for a conventional op amp connected as an inverter because
a fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor RG.
INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-
SUPPLY APPLICATIONS
The inputs of the AD8133 are designed to facilitate level-
shifting of ground referenced input signals on a single power
supply. For a single-ended input, this would imply, for example,
amplifier’s negative power supply voltage was also set to 0 V.
It is important to ensure that the common-mode voltage at the
amplifier inputs, VAP and VAN, stays within its specified range.
Since voltages VAP and VAN are driven to be essentially equal by
negative feedback, the amplifier’s input common-mode voltage
can be expressed as a single term, VACM. VACM can be calculated
as follows
3
2 ICM
OCM
ACM
V
+
=
where VICM is the common-mode voltage of the input signal, i.e.,
2
IN
IP
ICM
V
+
=
.
DRIVING A CAPACITIVE LOAD
A purely capacitive load can react with the output
impedance of the AD8133 to reduce phase margin, resulting in
high frequency ringing in the pulse response. The best way to
minimize this effect is to place a small resistor in series with
each of the amplifier’s outputs to buffer the load capacitance.
OUTPUT PULL-DOWN (OPD)
The AD8133 has an OPD pin that when pulled high signifi-
cantly reduces the power consumed while simultaneously
pulling the outputs to within less than 1 V of VS when used
with series diodes (see the Applications section). The equivalent
schematic of the output pull-down circuit is shown in Figure 35.
(The ESD diodes shown in Figure 35 are for ESD protection and
are distinct from the series diodes used with the output pull-
down feature.) See Figure 18 and Figure 21 for the output
pull-down transient and isolation performance plots. The
threshold levels for the OPD pin are referenced to the positive
power supply voltage and are presented in the Specifications
tables. When the OPD pin is pulled high, the AD8133 enters the
output low disable state.
VOUT
ESD
DIODE
ESD
DIODE
VCC
PULLDOWN
(OUTPUT IS
PULLED DOWN
WHEN SWITCH
IS CLOSED)
VS–
04769-0-004
VS+
Figure 35. Output Pull-Down Equivalent Circuit
OUTPUT COMMON-MODE CONTROL
The AD8133 allows the user to control each of the three
common-mode output levels independently through the three
VOCM input pins. The VOCM pins pass a signal to the common-
mode output level of each of their respective amplifiers with
330 MHz of small signal bandwidth and an internally fixed
gain of one. In this way, additional control and communication
signals can be embedded on the common-mode levels as the
user sees fit.
With no external circuitry, the level at the VOCM input of each
amplifier defaults to approximately midsupply. An internal
resistive divider with an impedance of approximately 100 k
sets this level. To limit common-mode noise in dc common-
mode applications, external bypass capacitors should be
connected from each of the VOCM input pins to ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8133ACPZ-REEL7 | 功能描述:IC OPAMP DIFF TRPL LDIST 24LFCSP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉(zhuǎn)換速率:350 V/µs 增益帶寬積:180MHz -3db帶寬:320MHz 電流 - 輸入偏壓:12.5µA 電壓 - 輸入偏移:800µV 電流 - 電源:15mA 電流 - 輸出 / 通道:85mA 電壓 - 電源，單路/雙路(±):2.5 V ~ 12.6 V，±1.25 V ~ 6.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| AD8134 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple Differential Driver With Sync-On-Common-Mode |
| AD8134ACP-R2 | 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple 制造商:Analog Devices 功能描述:SP AMP DIFF LINE DRVR AMP TRIPLE 6V/6V 24LFCSP EP - Tape and Reel |
| AD8134ACP-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple Differential Driver With Sync-On-Common-Mode |
| AD8134ACP-REEL7 | 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
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