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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD812AR |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 11/16闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OPAMP DUAL CURR-FDBK 8-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 98 |
| 鎳�(y墨ng)鐢細 | 闆绘祦鍙嶉 |
| 闆昏矾鏁�(sh霉)锛� | 2 |
| -3db甯跺锛� | 145MHz |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 1600 V/µs |
| 闆绘祦 - 闆绘簮锛� | 4.5mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 50mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 2.4 V ~ 36 V锛�±1.2 V ~ 18 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)鐣�(d膩ng)鍓嶇11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)
AD812A
Model
Conditions
V
S
Min
Typ
Max
Units
DC PERFORMANCE
Input Offset Voltage
+5 V, +3 V
1.5
4.5
mV
T
MIN 鈥揟MAX
7.0
mV
Offset Drift
+5 V, +3 V
7
V/掳C
鈥揑nput Bias Current
+5 V, +3 V
2
20
A
T
MIN 鈥揟MAX
30
A
+Input Bias Current
+5 V, +3 V
0.2
1.5
A
T
MIN 鈥揟MAX
2.0
A
Open-Loop Voltage Gain
V
O = +2.5 V p-p
+5 V
67
73
dB
V
O = +0.7 V p-p
+3 V
70
dB
Open-Loop Transresistance
V
O = +2.5 V p-p
+5 V
250
400
k
V
O = +0.7 V p-p
+3 V
300
k
INPUT CHARACTERISTICS
Input Resistance
+Input
+5 V
15
M
鈥揑nput
+5 V
90
Input Capacitance
+Input
2
pF
Input Common Mode
+5 V
1.0
4.0
V
Voltage Range
+3 V
1.0
2.0
V
Common-Mode Rejection Ratio
Input Offset Voltage
V
CM = 1.25 V to 3.75 V
+5 V
52
55
dB
鈥揑nput Current
35.5
A/V
+Input Current
0.1
0.2
A/V
Input Offset Voltage
V
CM = 1 V to 2 V
+3 V
52
dB
鈥揑nput Current
3.5
A/V
+Input Current
0.1
A/V
OUTPUT CHARACTERISTICS
Output Voltage Swing p-p
R
L = 1 k, TMIN 鈥揟MAX
+5 V
3.0
3.2
V p-p
R
L = 150 , TMIN 鈥揟MAX
+5 V
2.8
3.1
V p-p
+3 V
1.0
1.3
V p-p
Output Current
+5 V
20
30
mA
+3 V
15
25
mA
Short Circuit Current
G = +2, R
F = 715
+5 V
40
mA
V
IN = 1 V
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
G = +2, f = 5 MHz
+5 V, +3 V
鈥�72
dB
Gain Flatness Match
G = +2, f = 20 MHz
+5 V, +3 V
0.1
dB
DC
Input offset Voltage
T
MIN 鈥揟MAX
+5 V, +3 V
0.5
3.5
mV
鈥揑nput Bias Current
T
MIN 鈥揟MAX
+5 V, +3 V
2
25
A
POWER SUPPLY
Operating Range
2.4
36
V
Quiescent Current
Per Amplifier
+5 V
3.2
4.0
mA
+3 V
3.0
3.5
mA
T
MIN 鈥揟MAX
+5 V
4.5
mA
Power Supply Rejection Ratio
Input Offset Voltage
V
S = +3 V to +30 V
70
80
dB
鈥揑nput Current
0.3
0.6
A/V
+Input Current
0.005
0.05
A/V
TRANSISTOR COUNT
56
NOTES
1Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
2Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53.
Specifications subject to change without notice.
AD812鈥揝PECIFICATIONS
Single Supply (Continued)
REV. B
鈥�4鈥�
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