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參數(shù)資料
| 型號(hào)： | AD8116JSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO CROSSPOINT SWIT 128LQFP |
| 產(chǎn)品變化通告： | Mold Change 11/Jul/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 視頻交叉點(diǎn)開關(guān) |
| 電路： | 1 x 16:16 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 5.5 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
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AD8116
–22–
REV. B
Optimized for video applications, all signal inputs and outputs
are terminated with 75
resistors. Figure 16 shows a cross-
section of one of the input or output tracks along with the
arrangement of the PCB layers. It should be noted that unused
regions of the four layers are filled up with ground planes. As a
result, the input and output traces, in addition to having con-
trolled impedances, are well shielded.
w = 0.008"
(0.2mm)
a = 0.008"
(0.2mm)
c = 0.028"
(0.714mm)
t = 0.00135" (0.0343mm)
TOP LAYER
SIGNAL LAYER
POWER LAYER
BOTTOM LAYER
b = 0.0132"
(0.335mm)
d = 0.0132"
(0.335mm)
Figure 16. Cross Section of Input and Output Traces
The board has 32 BNC type connectors: 16 inputs and 16 outputs.
The connectors are arranged in two crescents around the device.
As can be seen from Figure 13, this results in all sixteen input
signal traces and all sixteen signal output traces having the same
length. This is useful in tests such as All-Hostile Crosstalk
where the phase relationship and delay between signals needs to
be maintained from input to output.
The four power supply pins AVCC, DVCC, AVEE and DVEE
should be connected to good quality, low noise,
±5 V supplies.
Where the same
±5 V power supplies are used for analog and
digital, separate cables should be run for the power supply to the
evaluation board’s analog and digital power supply pins.
As can be seen in Figure 17, there is extensive power supply
decoupling on the evaluation board. Figure 17 shows the
location of all the decoupling capacitors relative to the AD8116’s
pins. Four large 10
F capacitors are located near the
evaluation board’s power supply connection terminals.
These decouple the AVCC, DVCC, AVEE and DVEE
supplies. Because it is required that the voltage difference
between DGND and AGND never exceed 0.7 V, these
grounds are connected by two antiparallel diodes. On the
output side of the device (Pin 65 to Pin 96), the sixteen output
pins are interleaved with the AVCC and AVEE power supply
pins. Each of these pins is locally decoupled with a 0.01
F
capacitor. These pins are also decoupled in groups of four with
0.1
F capacitors. Due to space constraints the power supply
Pins 34 (DVCC) and 42 (DVEE) are neither connected nor
decoupled. These pins are, however, internally connected to
DVCC and DVEE (Pins 127 and 119).
As a general rule, each power supply pin (or group of adjacent
power supply pins) should be locally decoupled with a 0.01
F
capacitor. If there is a space constraint, it is more important to
decouple analog power supply pins before digital power supply
pins. A 0.1
F capacitor, located reasonably close to the pins,
can be used to decouple a number of power supply pins. Finally
a 10
F capacitor should be used to decouple power supplies as
they come on to the board.
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| AD8117 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz, 32 】 32 Buffered Analog Crosspoint Switch |
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| AD8117ABPZ | 功能描述:IC CROSSPOINT SWIT 32X32 304BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
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