參數(shù)資料
型號(hào): AD8115AST
廠商: ANALOG DEVICES INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Low Cost 225 MHz 16 X 16 Crosspoint Switches
中文描述: 16-CHANNEL, CROSS POINT SWITCH, PQFP100
封裝: 14 X 14 MM, PLASTIC, LQFP-100
文件頁數(shù): 15/26頁
文件大?。?/td> 363K
代理商: AD8115AST
AD8114/AD8115
–15–
REV. 0
THEORY OF OPERATION
The AD8114 (G = +1) and AD8115 (G = +2) are crosspoint
arrays with 16 outputs, each of which can be connected to any
one of 16 inputs. Organized by output row, 16 switchable trans-
conductance stages are connected to each output buffer, in the
form of a 16-to-1 multiplexer. Each of the 16 rows of transconduc-
tance stages are wired in parallel to the 16 input pins, for a total
array of 256 transconductance stages. Decoding logic for each
output selects one (or none) of the transconductance stages to
drive the output stage. The transconductance stages are NPN-
input differential pairs, sourcing current into the folded cascode
output stage. The compensation network and emitter follower
output buffer are in the output stage. Voltage feedback sets the
gain, with the AD8114 being configured as a unity gain follower,
and the AD8115 as a gain-of-two amplifier with a feedback
network.
This architecture provides drive for a reverse-terminated video
load (150
), with low differential gain and phase error for
relatively low power consumption. Power consumption is fur-
ther reduced by disabling outputs and transconductance stages
that are not in use. The user will notice a small increase in input
bias current as each transconductance stage is enabled.
Features of the AD8114 and AD8115 simplify the construction
of larger switch matrices. The unused outputs of both devices
can be disabled to a high impedance state, allowing the outputs
of multiple ICs to be bused together. In the case of the AD8115, a
feedback isolation scheme is used so that the impedance of the
gain-of-two feedback network does not load the output. Because
no additional input buffering is necessary, high input resistance
and low input capacitance are easily achieved without additional
signal degradation. To control enable glitches, it is recommended
that the disabled output voltage be maintained within its normal
enabled voltage range (
±
3.3 V). If necessary, the disabled out-
put can be kept from drifting out of range by applying an output
load resistor to ground.
A flexible TTL-compatible logic interface simplifies the pro-
gramming of the matrix. Both parallel and serial loading into a
first rank of latches programs each output. A global latch simul-
taneously updates all outputs. A power-on reset pin is available
to avoid bus conflicts by disabling all outputs.
APPLICATIONS
The AD8114/AD8115 have two options for changing the pro-
gramming of the crosspoint matrix. In the first option a serial
word of 80 bits can be provided that will update the entire ma-
trix each time. The second option allows for changing a single
output’s programming via a parallel interface. The serial option
requires fewer signals, but more time (clock cycles) for changing
the programming, while the parallel programming technique re-
quires more signals, but can change a single output at a time
and requires fewer clock cycles to complete programming.
Serial Programming
The serial programming mode uses the device pins
CE
, CLK,
DATA IN,
UPDATE
and
SER
/PAR. The first step is to assert a
LOW on
SER
/PAR in order to enable the serial programming
mode.
CE
for the chip must be LOW to allow data to be clocked
into the device. The
CE
signal can be used to address an indi-
vidual device when devices are connected in parallel.
The
UPDATE
signal should be HIGH during the time that data
is shifted into the device’s serial port. Although the data will still
shift in when
UPDATE
is LOW, the transparent, asynchronous
latches will allow the shifting data to reach the matrix. This will
cause the matrix to try to update to every intermediate state as
defined by the shifting data.
The data at DATA IN is clocked in at every down edge of CLK.
A total of 80 bits must be shifted in to complete the program-
ming. For each of the 16 outputs, there are four bits (D0–D3)
that determine the source of its input followed by one bit (D4)
that determines the enabled state of the output. If D4 is LOW
(output disabled), the four associated bits (D0–D3) do not
matter, because no input will be switched to that output.
The most-significant-output-address data is shifted in first, then
following in sequence until the least-significant-output-address
data is shifted in. At this point
UPDATE
can be taken LOW,
which will cause the programming of the device according to the
data that was just shifted in. The
UPDATE
registers are asyn-
chronous and when
UPDATE
is LOW (and
CE
is LOW), they
are transparent.
If more than one AD8114/AD8115 device is to be serially pro-
grammed in a system, the DATA OUT signal from one device
can be connected to the DATA IN of the next device to form a
serial chain. All of the CLK,
CE
,
UPDATE
and
SER
/PAR pins
should be connected in parallel and operated as described above.
The serial data is input to the DATA IN pin of the first device
of the chain, and it will ripple on through to the last. Therefore,
the data for the last device in the chain should come at the be-
ginning of the programming sequence. The length of the pro-
gramming sequence will be 80 bits times the number of devices
in the chain.
Parallel Programming
When using the parallel programming mode, it is not necessary
to reprogram the entire device when making changes to the
matrix. In fact, parallel programming allows the modification
of a single output at a time. Since this takes only one CLK/
UPDATE
cycle, significant time savings can be realized by
using parallel programming.
One important consideration in using parallel programming is
that the
RESET
signal DOES NOT RESET ALL REGISTERS
in the AD8114/AD8115. When taken low, the
RESET
signal
will only set each output to the disabled state. This is helpful
during power-up to ensure that two parallel outputs will not be
active at the same time.
After initial power-up, the internal registers in the device will
generally have random data, even though the
RESET
signal has
been asserted. If parallel programming is used to program one
output, then that output will be properly programmed, but the
rest of the device will have a random program state depending
on the internal register content at power-up. Therefore, when
using parallel programming, it is essential that ALL OUTPUTS
BE PROGRAMMED TO A DESIRED STATE AFTER
POWER-UP. This will ensure that the programming matrix is
always in a known state. From then on, parallel programming
can be used to modify a single output or more at a time.
In similar fashion, if both
CE
and
UPDATE
are taken LOW
after initial power-up, the random power-up data in the shift
register will be programmed into the matrix. Therefore, in order
to prevent the crosspoint from being programmed into an un-
known state DO NOT APPLY LOW LOGIC LEVELS TO
BOTH
CE
AND
UPDATE
AFTER POWER IS INITIALLY
相關(guān)PDF資料
PDF描述
AD8114-EB Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8115-EB Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8114 ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
AD8114AST Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8115 Low Cost 225 MHz 16 X 16 Crosspoint Switches
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8115ASTZ 功能描述:IC VIDEO CROSSPOINT SWIT 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān),多路復(fù)用器,多路分解器 系列:- 特色產(chǎn)品:MicroPak? 標(biāo)準(zhǔn)包裝:1 系列:- 功能:開關(guān) 電路:2 x SPST - NC 導(dǎo)通狀態(tài)電阻:500 毫歐 電壓電源:單電源 電壓 - 電源,單路/雙路(±):1.4 V ~ 4.3 V 電流 - 電源:150nA 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-XFDFN 供應(yīng)商設(shè)備封裝:8-XSON,SOT833-1 (1.95x1) 包裝:Digi-Reel® 其它名稱:568-5557-6
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AD8115ASTZ2 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Cost 225 MHz 16 ?? 16 Crosspoint Switches
AD8115-EB 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Cost 225 MHz 16 X 16 Crosspoint Switches
AD8115-EVAL 制造商:Analog Devices 功能描述:EVAL BD LOW COST 225 MHZ 16 16 CROSSPOINT SWITES - Bulk