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參數(shù)資料
| 型號： | AD810 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power Video Op Amp with Disable(帶禁用的低功耗視頻運放) |
| 中文描述： | 低功耗視頻運算放大器具有禁用（帶禁用的低功耗視頻運放） |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 521K |
| 代理商： | AD810 |
AD810
REV. A
–11–
GE NE RAL DE SIGN CONSIDE RAT IONS
T he AD810 is a current feedback amplifier optimized for use in
high performance video and data acquisition systems. Since it
uses a current feedback architecture, its closed-loop bandwidth
depends on the value of the feedback resistor. T able I below
contains recommended resistor values for some useful closed-
loop gains and supply voltages. As you can see in the table, the
closed-loop bandwidth is not a strong function of gain, as it
would be for a voltage feedback amp. T he recommended
resistor values will result in maximum bandwidths with less than
0.1 dB of peaking in the gain vs. frequency response.
T he –3 dB bandwidth is also somewhat dependent on the power
supply voltage. Lowering the supplies increases the values of
internal capacitances, reducing the bandwidth. T o compensate
for this, smaller values of feedback resistor are sometimes used
at lower supply voltages. T he characteristic curves illustrate that
bandwidths of over 100 MHz on 30 V total and over 50 MHz
on 5 V total supplies can be achieved.
T able I. –3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values (R
L
= 150
V
)
V
S
=
6
15 V
Closed-Loop
Gain
–3 dB BW
(MHz)
R
FB
1 k
715
270
681
249
R
G
+1
+2
+10
–1
–10
V
S
=
6
5 V
Closed-Loop
Gain
80
75
65
70
65
715
30
681
24.9
–3 dB BW
(MHz)
R
FB
910
715
270
620
249
R
G
+1
+2
+10
–1
–10
50
50
50
55
50
715
30
620
24.9
ACHIE VING VE RY FLAT GAIN RE SPONSE AT
HIGH FRE QUE NCY
Achieving and maintaining gain flatness of better than 0.1 dB
above 10 MHz is not difficult if the recommended resistor
values are used. T he following issues should be considered to
ensure consistently excellent results.
CHOICE OF FE E DBACK AND GAIN RE SIST OR
Because the 3 dB bandwidth depends on the feedback resistor,
the fine scale flatness will, to some extent, vary with feedback
resistor tolerance. It is recommended that resistors with a 1%
tolerance be used if it is desired to maintain exceptional flatness
over a wide range of production lots.
PRINT E D CIRCUIT BOARD LAY OUT
As with all wideband amplifiers, PC board parasitics can affect
the overall closed-loop performance. Most important are stray
capacitances at the output and inverting input nodes. (An added
capacitance of 2 pF between the inverting input and ground will
add about 0.2 dB of peaking in the gain of 2 response, and
increase the bandwidth to 105 MHz.) A space (3/16" is plenty)
should be left around the signal lines to minimize coupling.
Also, signal lines connecting the feedback and gain resistors
should be short enough so that their associated inductance does
not cause high frequency gain errors. Line lengths less than 1/4"
are recommended.
QUALIT Y OF COAX CABLE
Optimum flatness when driving a coax cable is possible only
when the driven cable is terminated at each end with a resistor
matching its characteristic impedance. If coax were ideal, then
the resulting flatness would not be affected by the length of the
cable. While outstanding results can be achieved using
inexpensive cables, some variation in flatness due to varying
cable lengths is to be expected.
POWE R SUPPLY BY PASSING
Adequate power supply bypassing can be critical when
optimizing the performance of a high frequency circuit.
Inductance in the power supply leads can contribute to resonant
circuits that produce peaking in the amplifier's response. In
addition, if large current transients must be delivered to the
load, then bypass capacitors (typically greater than 1
μ
F) will be
required to provide the best settling time and lowest distortion.
Although the recommended 0.1
μ
F power supply bypass
capacitors will be sufficient in most applications, more elaborate
bypassing (such as using two paralleled capacitors) may be
required in some cases.
POWE R SUPPLY OPE RAT ING RANGE
T he AD810 will operate with supplies from
±
18 V down to
about
±
2.5 V. On
±
2.5 V the low distortion output voltage
swing will be better than 1 V peak to peak. Single supply
operation can be realized with excellent results by arranging for
the input common-mode voltage to be biased at the supply
midpoint.
OFFSE T NULLING
A 10 k
pot connected between Pins 1 and 5, with its wiper
connected to V+, can be used to trim out the inverting input
current (with about
±
20
μ
A of range). For closed-loop gains
above about 5, this may not be sufficient to trim the output
offset voltage to zero. T ie the pot's wiper to ground through a
large value resistor (50 k
for
±
5 V supplies, 150 k
for
±
15 V
supplies) to trim the output to zero at high closed-loop gains.
Applications–
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