參數(shù)資料
型號(hào): AD8092AR
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/21頁(yè)
文件大?。?/td> 0K
描述: IC OPAMP VF R-R DUAL LDIST 8SOIC
標(biāo)準(zhǔn)包裝: 98
放大器類型: 電壓反饋
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 170 V/µs
-3db帶寬: 110MHz
電流 - 輸入偏壓: 1.4µA
電壓 - 輸入偏移: 1800µV
電流 - 電源: 4.8mA
電流 - 輸出 / 通道: 45mA
電壓 - 電源,單路/雙路(±): 3 V ~ 12 V,±1.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
AD8091/AD8092
Rev. C | Page 12 of 20
LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS
POWER SUPPLY BYPASSING
Power supply pins are actually inputs, and care must be taken so
that a noise-free stable dc voltage is applied. The purpose of
bypass capacitors is to create low impedances from the supply
to ground at all frequencies, thereby shunting or filtering a
majority of the noise.
Decoupling schemes are designed to minimize the bypassing
impedance at all frequencies with a parallel combination of
capacitors. Chip capacitors of 0.01 μF or 0.001 μF (X7R or
NPO) are critical and should be as close as possible to the
amplifier package. Larger chip capacitors, such as the 0.1 μF
capacitor, can be shared among a few closely spaced active
components in the same signal path. A 10 μF tantalum
capacitor is less critical for high frequency bypassing and, in
most cases, only one per board is needed at the supply inputs.
GROUNDING
A ground plane layer is important in densely packed PC boards
to spread the current-minimizing parasitic inductances.
However, an understanding of where the current flows in a
circuit is critical to implementing effective high speed circuit
design. The length of the current path is directly proportional to
the magnitude of parasitic inductances and thus the high
frequency impedance of the path. High speed currents in an
inductive ground return create an unwanted voltage noise.
The lengths of the high frequency bypass capacitor leads are
most critical. A parasitic inductance in the bypass grounding
works against the low impedance created by the bypass
capacitor. Place the ground leads of the bypass capacitors at the
same physical location. Because load currents flow from the
supplies as well, the ground for the load impedance should be at
the same physical location as the bypass capacitor grounds. For
the larger value capacitors, which are intended to be effective at
lower frequencies, the current return path distance is less
critical.
INPUT CAPACITANCE
Along with bypassing and ground, high speed amplifiers can
be sensitive to parasitic capacitance between the inputs and
ground. A few pF of capacitance reduces the input impedance
at high frequencies, in turn increasing the amplifier’s gain and
causing peaking of the frequency response or even oscillations,
if severe enough. It is recommended that the external passive
components, which are connected to the input pins, be placed
as close as possible to the inputs to avoid parasitic capacitance.
The ground and power planes must be kept at a distance of at
least 0.05 mm from the input pins on all layers of the board.
INPUT-TO-OUTPUT COUPLING
The input and output signal traces should not be parallel to
minimize capacitive coupling between the inputs and output
and to avoid any positive feedback.
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