VEE SDOUT NIN AVCC1 THR" />
參數(shù)資料
型號： AD808-622BRZRL7
廠商： Analog Devices Inc
文件頁數(shù)： 11/12頁
文件大?。?/td> 0K
描述： IC RECEIVER FIBER OPTIC 16SOIC
標準包裝： 1,000
類型： 接收器
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC
包裝： 帶卷 (TR)
REV. 0
–8–
AD808
1
2
5
6
7
3
4
8
VEE
SDOUT
NIN
AVCC1
THRADJ
AVEE
AD808
PIN
16
15
12
11
10
14
13
9
R10
154
R9
154
R6 100
C7
R5 100
R1
100
R2
100
C1 0.1 F
DATAOUTN
DATAOUTP
CLKOUTN
CLKOUTP
C5 0.1 F
C2
0.1 F
R4
100
R8 100
R7 100
R3
100
C8
R12
154
TP1
TP2
R11
154
CD
TP7
SDOUT
TP5
TP6
RTHRESH
C11
10 F
C10
GND
R14
49.9
R15
49.9
C12
0.1 F
C4 0.1 F
C3 0.1 F
C6
0.1 F
J1
J2
J3
J4
+5V
TP3
TP4
NOTE: INTERCONNECT RUN
UNDER DUT
VECTOR PINS SPACED FOR RN55C
TYPE RESISTOR; COMPONENT
SHOWN FOR REFERENCE ONLY
VECTOR PINS SPACED THROUGH-HOLE
CAPACITOR ON VECTOR CUPS; COMPONENT
SHOWN FOR REFERENCE ONLY
TP8
J5
C9
R13
301
R16 3.65k
J6
J7
C13 0.1 F
C14 0.1 F
PIN
NIN
50
STRIP LINE
EQUAL LENGTH
NOTE:
C7–C10 ARE 0.1F BYPASS CAPACITORS
RIGHT ANGLE SMA CONNECTOR
OUTER SHELL TO GND PLANE
ALL RESISTORS ARE 1% 1/8 WATT SURFACE MOUNT
TPxo TEST POINTS ARE VECTORBOARD K24A/M PINS
DATAOUTN
DATAOUTP
VCC2
CLKOUTN
CLKOUTP
VCC1
CF1
CF2
AVCC2
Figure 15. Evaluation Board Schematic
Center Frequency Clamp (Figure 13)
An N-channel FET circuit can be used to bring the AD808
VCO center frequency to within
±10% of 622 MHz when
SDOUT indicates a Loss of Signal (LOS). This effectively re-
duces the frequency acquisition time by reducing the frequency
error between the VCO frequency and the input data frequency
at clamp release. The N-FET can have “on” resistance as high
as 1 k
and still attain effective clamping. However, the chosen
N-FET should have greater than 10 M
“off” resistance and
less than 100 nA leakage current (source and drain) so as not to
alter normal PLL performance.
1
2
5
6
7
3
4
8
16
15
12
11
10
14
13
9
VEE
SDOUT
AVCC2
PIN
NIN
AVCC1
THRADJ
AVEE
DATAOUTN
DATAOUTP
CLKOUTN
CLKOUTP
VCC1
CF1
CF2
VCC2
AD808
N_FET
CD
Figure 13. Center Frequency Clamp Schematic
RBW:
30Hz ST: 3.07 min RANGE: R=
0, T=
0dBm
DIV
20.00m
CD
PEAK
0.047
0.11
0.10
0.07
0.47
0.04
DIV
36.00m
START
STOP
500.000Hz
100 000.000Hz
Figure14. Jitter Transfer vs. CD
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD808ACHIPS 功能描述:Receiver Die 制造商:analog devices inc. 系列:- 包裝:- 零件狀態(tài):上次購買時間 類型:接收器 協(xié)議:- 驅(qū)動器/接收器數(shù):- 雙工:- 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:- 供應(yīng)商器件封裝:模具 標準包裝:1
AD8091AR 制造商:Analog Devices 功能描述:OP Amp Single GP R-R O/P 制造商:Rochester Electronics LLC 功能描述:LOW COST RAIL TO RAIL OUT AMPLIFIER - Bulk 制造商:Analog Devices 功能描述:IC SM AMP HIGH SPEED RRO/P
AD8091AR-EBZ 功能描述:BOARD EVAL FOR AD8091AR RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 運算放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:-
AD8091AR-REEL 制造商:Analog Devices 功能描述:OP Amp Single GP R-R O/P 制造商:Rochester Electronics LLC 功能描述:LOW COST RAIL-TO-RAIL OUTPUT AMPLIFIER - Tape and Reel
AD8091AR-REEL7 制造商:Analog Devices 功能描述:OP Amp Single GP R-R O/P 制造商:Rochester Electronics LLC 功能描述:LOW COST RAIL-TO-RAIL OUTPUT AMPLIFIER - Tape and Reel
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