- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨�(m菐i)璩�(m脿i)IC缍�(w菐ng) > PDF鐩寗10006 > AD807A-155BRZRL (Analog Devices Inc)IC RECEIVER FIBER OPTIC 16SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AD807A-155BRZRL |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 3/12闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC RECEIVER FIBER OPTIC 16SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 椤�(l猫i)鍨嬶細 | 鎺ユ敹鍣� |
| 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉)锛� | 0/1 |
| 瑕�(gu墨)绋嬶細 | SDHj Sonet |
| 闆绘簮闆诲锛� | 4.5 V ~ 5.5 V |
| 瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 16-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 16-SOIC |
| 鍖呰锛� | 甯跺嵎 (TR) |
绗�1闋�(y猫)绗�2闋�(y猫)鐣�(d膩ng)鍓嶇3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)
REV. B
AD807
鈥�11鈥�
AD807
DATAOUTN
DATAOUTP
VCC2
CLKOUTN
CF1
CF2
VEE
SDOUT
PIN
NIN
AVCC1
THRADJ
AVEE
SDOUT
VCC1
CLKOUTP
AVCC2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
CD
R5 100
R6 100
R10
154
R9
154
C7 0.1 F
R7 100
R8 100
C8
0.1 F
R12
150
R11
150
R2
100
R1
100
C2 0.1 F
C3 0.1 F
C4 0.1 F
C5 0.1 F
R4
100
R3
100
C6
0.1 F
C1 0.1 F
J1
J2
J3
J4
R13
THRADJ
C11 0.1 F
C10
0.1 F
R14
47
R15
47
R16
330
C9
10 F
5V
C13
0.1 F
C14
0.1 F
30pF
NOISE FILTER
120nH
R17
3.9k
C12
0.1 F
EPITAXX
ERM504
1
2
PIN TIA
1 F
NOTE:
PIN TIA PIN 4 (CASE)
IS CONNECTED TO
GROUND
Figure 17. AD807 Application with Epitaxx PIN鈥擳ransimpedance Amplifier Module
The entire circuit was enclosed in a shielded box. Table I sum-
marizes results of tests performed using a 2
23-1 PRN Sequence,
and varying the average power at the PIN diode.
The circuit acquires and maintains lock with an average input
power as low as 鈥�39.25 dBm.
Table II. AD807鈥擡pitaxx ERM504 PIN TIA 155 Mbps
Fiber Optic Receiver Circuit: Output Bit Error Rate and
Output Jitter vs. Average Input Power
Average Optical
Input Power
Output Bit
Output Jitter
(dBm)
Error Rate
(ps rms)
0
0.0
脳 10鈥�10
29
鈥�3
0.0
脳 10鈥�10
35
鈥�10
0.0
脳 10鈥�10
40
鈥�20
0.0
脳 10鈥�10
37
鈥�30
0.0
脳 10鈥�10
33
鈥�32
0.0
脳 10鈥�10
35
鈥�34
0.0
脳 10鈥�10
36
鈥�35
0.0
脳 10鈥�10
39
鈥�35.5
0.0
脳 10鈥�10
40
鈥�36
0.0
脳 10鈥�10
41
鈥�37.0
0.0
脳 10鈥�10
42
鈥�37.6
0.5
脳 10鈥�10
43
鈥�38.0
4
脳 10鈥�6
50
SONET (OC-3)/SDH (STM-1) Fiber Optic Receiver Circuit
A light wave receiver circuit for SONET/SDH application at
155 Mbps is shown in Figure 17, with test results given in Table
II. The circuit operates from a single 5 V supply, and uses two
major components: an Epitaxx ERM504 PIN-TIA module with
AGC, and the AD807 IC.
A 120 MHz, third order, low-pass Butterworth filter at the
output of the PIN-TIA module provides adequate bandwidth
(70% of the bit rate), and attenuates high frequency (out of
band) noise.
250mV
50mV/
DIV
鈥�250mV
38.12ns
1ns/DIV
48.12ns
Figure 18. Receiver Output (Data) Eye Diagram,
0 dBm Optical Input
250mV
50mV/
DIV
鈥�250mV
38.12ns
1ns/DIV
48.12ns
Figure 19. Receiver Output (Data) Eye Diagram,
鈥�38 dBm Optical Input
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| AD807A-155BRZRL7 | 鍔熻兘鎻忚堪:IC RECEIVER FIBER OPTIC 16SOIC RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 椹�(q奴)鍕�(d貌ng)鍣紝鎺ユ敹鍣�锛屾敹鐧�(f膩)鍣� 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 椤�(l猫i)鍨�:鏀剁櫦(f膩)鍣� 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉):2/2 瑕�(gu墨)绋�:RS232 闆绘簮闆诲:3 V ~ 5.5 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:16-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-TSSOP 鍖呰:甯跺嵎 (TR) |
| AD807ACHIPS | 鍔熻兘鎻忚堪:0/1 Receiver SDH Sonet Die 鍒堕€犲晢:analog devices inc. 绯诲垪:- 鍖呰:鎵樼洡(p谩n) 闆朵欢鐙€鎱�(t脿i):涓婃璩�(g貌u)璨�(m菐i)鏅�(sh铆)闁� 椤�(l猫i)鍨�:鎺ユ敹鍣� 鍗�(xi茅)璀�:SDH 鍚屾鍏夌恫(w菐ng)绲�(lu貌) 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉):0/1 闆欏伐:- 鎺ユ敹鍣ㄦ化鍚�:- 鏁�(sh霉)鎿�(j霉)閫熺巼:- 闆诲 - 闆绘簮:4.5 V ~ 5.5 V 宸ヤ綔婧害:-40掳C ~ 85掳C 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:- 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�:妯″叿 妯�(bi膩o)婧�(zh菙n)鍖呰:1 |
| AD808-622BR | 鍔熻兘鎻忚堪:IC FIBER OPTIC RCVR 16-SOIC RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 椹�(q奴)鍕�(d貌ng)鍣�锛屾帴鏀跺櫒锛屾敹鐧�(f膩)鍣� 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 椤�(l猫i)鍨�:鏀剁櫦(f膩)鍣� 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉):2/2 瑕�(gu墨)绋�:RS232 闆绘簮闆诲:3 V ~ 5.5 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:16-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-TSSOP 鍖呰:甯跺嵎 (TR) |
| AD808-622BRRL | 鍔熻兘鎻忚堪:IC FIBER OPTIC RCVR 16-SOIC RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 椹�(q奴)鍕�(d貌ng)鍣紝鎺ユ敹鍣�锛屾敹鐧�(f膩)鍣� 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 椤�(l猫i)鍨�:鏀剁櫦(f膩)鍣� 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉):2/2 瑕�(gu墨)绋�:RS232 闆绘簮闆诲:3 V ~ 5.5 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 灏佽/澶栨:16-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-TSSOP 鍖呰:甯跺嵎 (TR) |
| AD808-622BRRL7 | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Fiber Optic Receiver 16-Pin SOIC N T/R 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:FIBER OPTIC RECEIVER - 622 MBPS - Bulk |
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