AD8024鈥揝PECIFICATIONS (@ T A = 25 C, V
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AD8024ARZ
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 7/13闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC OPAMP CF QUAD LP 50MA 16SOIC
妯欐簴鍖呰锛� 48
鏀惧ぇ鍣ㄩ鍨嬶細 闆绘祦鍙嶉
闆昏矾鏁�(sh霉)锛� 4
杞夋彌閫熺巼锛� 390 V/µs
-3db甯跺锛� 200MHz
闆绘祦 - 杓稿叆鍋忓锛� 1µA
闆诲 - 杓稿叆鍋忕Щ锛� 2000µV
闆绘祦 - 闆绘簮锛� 16mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 50mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 5 V ~ 24 V锛�±2.5 V ~ 12 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 16-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳鍟嗚ō鍌欏皝瑁濓細 16-SOIC
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 769 (CN2011-ZH PDF)
鈥�2鈥�
REV. C
AD8024鈥揝PECIFICATIONS (@ T
A = 25 C, VS =
7.5 V, CLOAD = 10 pF, RL = 150
, unless otherwise noted.)
Model
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Bandwidth (3 dB)
RFB = 800
, No Peaking, G = +3
160
200
MHz
Bandwidth (0.1 dB)
No Peaking, G = +3
25
MHz
Slew Rate
6 V Step, G = +3, CLOAD = 300 pF
370
390
V/
s
Settling Time to 0.1%
TA = 25
掳C to 85掳C, 卤3 V (6 V Step)
30
ns
CLOAD = 300 pF, RS = 10.5
, RLOAD > 1 k,
RFB = 2.32 k
卤1 V (2 V Step), CLOAD = 5 pF,
18
ns
RS = 0
, R
LOAD > 1 k
, R
FB = 750 k
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion
fC = 5 MHz, RL = 1 k
鈥�72
dBc
fC = 5 MHz, RL = 150
鈥�67
dBc
Input Voltage Noise
f = 10 kHz
3
nV/
鈭欻z
Input Current Noise
f = 10 kHz (鈥揑IN)
8
pA/
鈭欻z
Differential Gain (RL = 150
)
f = 3.58 MHz, G = +2
0.04
%
Differential Phase (RL = 150
)
f = 3.58 MHz, G = +2
0.09
Degrees
DC PERFORMANCE
Input Offset Voltage
TMIN to TMAX
25
mV
Offset Drift
1.5
V/掳C
+Input Bias Current
1
7.5
A
鈥揑nput Bias Current
13
A
Open-Loop Transresistance
0.850
1.2
M
TMIN to TMAX
0.840
M
INPUT CHARACTERISTICS
Input Resistance
+Input
TMIN to TMAX
1M
鈥揑nput
TMIN to TMAX
135
Input Capacitance
2pF
Input Common-Mode Voltage
鈥揤S + 1.2
+VS 鈥� 2
V
Common-Mode Rejection Ratio
Input Offset Voltage
62
66
dB
鈥揑nput Current
0.2
A/V
+Input Current
1
A/V
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 1 k
VOL 鈥� VEE
0.8
1.0
V
VCC 鈥� VOH
1.1
1.3
V
RL = 150
VOL 鈥� VEE
1.0
1.35
V
VCC 鈥� VOH
1.3
1.55
V
Linear Output Current
Error <3%, R1 = 50
35
50
mA
Max Dynamic Output Current
300
mA
Capacitive Load Drive
1000
pF
MATCHING CHARACTERISTICS
Dynamic
Crosstalk (Worst Between Any 2)
G = +2, f = 5 MHz
鈥�58
dB
DC
Input Offset Voltage Match
0.4
1.5
mV
Input Current Match
0.1
2.0
A
POWER SUPPLY
Operating Range
Single Supply
5
24
V
Dual Supply
卤2.5
卤12
V
Total Quiescent Current
16
17
mA
TMIN to TMAX
19.5
mA
Disable = HIGH
0.5
1
mA
Power Supply Rejection Ratio
Input Offset Voltage
VS =
卤6.5 V to 卤8.5 V
64
70
dB
鈥揑nput Current
0.03
A/V
+Input Current
0.07
A/V
鐩搁棞PDF璩囨枡
PDF鎻忚堪
929834-03-12 CONN HEADER .100 SNGL STR 12POS
0791081058 CONN RCPT 2MM GOLD DL 18CKT
OP470GSZ IC OPAMP GP 6MHZ QUAD LN 16SOIC
26-48-2055 CONN HEADER 5POS .156 VERT GOLD
LTC2052HVCS#PBF IC OPAMP ZERO-DRIFT QUAD 14SOIC
鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�(sh霉)
鍙冩暩(sh霉)鎻忚堪
AD8024ARZ-REEL 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:OP Amp Quad Current Fdbk
AD8024ARZ-REEL7 鍔熻兘鎻忚堪:IC OPAMP CF QUAD LP 50MA 16SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞夋彌閫熺巼:13 V/µs 澧炵泭甯跺绌�:3MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:65pA 闆诲 - 杓稿叆鍋忕Щ:3000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳鍟嗚ō鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢
AD8024N3L-001 鍔熻兘鎻忚堪:鎻掑叆寮忎氦娴侀仼閰嶅櫒 78W 24V 3.25A RoHS:鍚� 鍒堕€犲晢:Phihong 鍦板崁(q奴):Universal 瀹夎棰ㄦ牸:Wall, Interchangeable Plug 杓稿叆闆诲鑼冨湇:90 VAC to 264 VAC 杓稿嚭绔暩(sh霉)閲�:1 杓稿嚭鍔熺巼椤嶅畾鍊�:5 W 杓稿嚭闆诲锛堥€氶亾 1锛�:5 V 杓稿嚭闆绘祦锛堥€氶亾 1锛�:1 A 鐩存祦杓稿嚭閫f帴鍣�:USB Type A 闅ㄩ檮/蹇呴渶鐨勪氦娴佹彃闋�:Required 鍟嗙敤/閱�(y墨)鐢�:Commercial 鏁堢巼:Level V
AD80253BCPZ-110 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:12 BIT, 110MSPS DUAL LOW POWER ADC - Trays
AD80253BCPZRL7-110 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:12 BIT, 110MSPS DUAL LOW POWER ADC - Tape and Reel