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參數(shù)資料
| 型號： | AD8008ARZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CF DUAL ULDIST LN 8SOIC |
| 標準包裝： | 1,000 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 1000 V/µs |
| -3db帶寬： | 650MHz |
| 電流 - 輸入偏壓： | 4µA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 9mA |
| 電流 - 輸出 / 通道： | 130mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 12 V，±2.5 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
AD8007/AD8008
Rev. E | Page 15 of
20
THEORY OF OPERATION
The AD8007 (single) and AD8008 (dual) are current feedback
amplifiers optimized for low distortion performance. A simplified
conceptual diagram of the AD8007 is shown in Figure 51. It
closely resembles a classic current feedback amplifier comprised
of a complementary emitter-follower input stage, a pair of signal
mirrors, and a diamond output stage. However, in the case of
the AD8007/AD8008, several modifications were made to improve
the distortion performance over that of a classic current feedback
topology.
IDI
–
+VS
–VS
CJ1
CJ2
Q1
Q2
IN–
–
D1
D2
I1
I2
IN+
I3
I4
IDO
Q3
Q4
Q5
Q6
+VS
–VS
RF
OUT
RG
M2
M1
HIGH-Z
02
86
6-
05
1
Figure 51. Simplified Schematic of AD8007
The signal mirrors were replaced with low distortion, high
precision mirrors. In Figure 51, they are shown as M1 and M2.
Their primary function from a distortion standpoint is to reduce
the effect of highly nonlinear distortion caused by capacitances,
CJ1 and CJ2. These capacitors represent the collector-to-base
capacitances of the output devices of the mirrors.
A voltage imbalance arises across the output stage, as measured
from the high impedance node, high-Z, to the output node, OUT.
This imbalance is a result of delivering high output currents and
is the primary cause of output distortion. Circuitry is included
to sense this output voltage imbalance and generate a compensating
current, IDO. When injected into the circuit, IDO reduces the
distortion that could be generated at the output stage. Similarly, the
nonlinear voltage imbalance across the input stage (measured from
the noninverting to the inverting input) is sensed, and a current,
IDI, is injected to compensate for input-generated distortion.
The design and layout are strictly top-to-bottom symmetric to
minimize the presence of even-order harmonics.
USING THE AD8007/AD8008
Supply Decoupling for Low Distortion
Decoupling for low distortion performance requires careful
consideration. The commonly adopted practice of returning the
high frequency supply decoupling capacitors to physically separate
(and possibly distant) grounds can lead to degraded even-order
harmonic performance. This situation is shown in Figure 52 using
the AD8007 as an example; however, it is not recommended. For a
sinusoidal input, each decoupling capacitor returns to its ground a
quasi-rectified current carrying high even-order harmonics.
+VS
–VS
RG
499
RS
200
IN
RF
499
GND 1
GND 2
OUT
AD8007
+
10F
0.1F
02
86
6-
05
2
Figure 52. High Frequency Capacitors Returned to Physically Separate
Grounds (Not Recommended)
The decoupling scheme shown in Figure 53 is recommended.
In Figure 53, the two high frequency decoupling capacitors are
first tied together at a common node and are then returned to
the ground plane through a single connection. By first adding
the two currents flowing through each high frequency decoupling
capacitor, this ensures that the current returned into the ground
plane is only at the fundamental frequency.
+VS
–VS
RG
499
RS
200
IN
RF
499
OUT
AD8007
+
10F
0.1F
10F
0.1F
028
66
-05
3
Figure 53. High Frequency Capacitors Returned to Ground at a Single Point
(Recommended)
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