參數(shù)資料
型號(hào)： AD7942BCPZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/24頁(yè)
文件大小： 0K
描述： IC ADC 14BIT SAR 250KSPS 10LFCSP
標(biāo)準(zhǔn)包裝： 5,000
系列： PulSAR®
位數(shù)： 14
采樣率（每秒）： 250k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1.25mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 10-LFCSP-WD（3x3）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 1 個(gè)偽差分，單極
配用： EVAL-AD7942CB-ND - BOARD EVALUATION FOR AD7942
AD7942
Rev. B | Page 17 of
24
CS Mode 3-Wire Without Busy Indicator
This mode is most often used when a single AD7942 is
connected to an SPI-compatible digital host. The connection
diagram is shown in Figure 30 and the corresponding timing
diagram is shown in Figure 31.
With SDI tied to VIO, a rising edge on CNV initiates a conver-
sion, selects the CS mode, and forces SDO to high impedance.
When a conversion is initiated, it continues to completion irres-
pective of the state of CNV. For instance, it is useful to bring
CNV low to select other SPI devices, such as analog
multiplexers. However, CNV must be returned high before the
minimum conversion time and held high until the maximum
conversion time to avoid generating the busy signal indicator.
When the conversion is complete the AD7942 enters the acqui-
sition phase and powers down. When CNV goes low, the MSB
is output onto SDO. The remaining data bits are then clocked
by subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host also using the SCK falling edge allows a faster
reading rate provided it has an acceptable hold time. After the
14th SCK falling edge or when CNV goes high, whichever is
earlier, SDO returns to high impedance.
CNV
SCK
SDO
SDI
DATA IN
CLK
CONVERT
VIO
DIGITAL HOST
AD7942
04
65
7
-03
0
Figure 30. CS Mode 3-Wire Without Busy Indicator
Connection Diagram (SDI High)
SDO
D13
D12
D11
D1
D0
tDIS
SCK
12
3
12
13
14
tSCK
tSCKL
tSCKH
tHSDO
tDSDO
CNV
CONVERSION
ACQUISITION
tCONV
tCYC
ACQUISITION
SDI = 1
tCNVH
tACQ
tEN
04
65
7-
0
31
Figure 31. CS Mode 3-Wire Without Busy Indicator, Serial Interface Timing (SDI High)
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參數(shù)描述
AD7942BCPZRL1 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/QFN
AD7942BCPZRL7 功能描述:IC ADC 14BIT 250KSPS 10-LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類(lèi)型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱(chēng):497-5435-6
AD7942BCPZRL71 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/QFN
AD7942BRM 制造商:Analog Devices 功能描述:ADC Single SAR 250ksps 14-bit Serial 10-Pin MSOP Tube 制造商:Analog Devices 功能描述:IC 14-BIT ADC
AD7942BRMRL7 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:14-Bit, 250 kSPS PulSAR ADC in MSOP/QFN
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