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    • 參數(shù)資料
      型號(hào): AD7924BRUZ-REEL
      廠商: Analog Devices Inc
      文件頁數(shù): 3/32頁
      文件大?。?/td> 0K
      描述: IC ADC 12BIT 4CH W/SEQ 16TSSOP
      標(biāo)準(zhǔn)包裝: 2,500
      位數(shù): 12
      采樣率(每秒): 1M
      數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
      轉(zhuǎn)換器數(shù)目: 1
      功率耗散(最大): 13.5mW
      電壓電源: 單電源
      工作溫度: -40°C ~ 85°C
      安裝類型: 表面貼裝
      封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
      供應(yīng)商設(shè)備封裝: 16-TSSOP
      包裝: 帶卷 (TR)
      輸入數(shù)目和類型: 4 個(gè)單端,單極
      配用: EVAL-AD79X4CBZ-ND - BOARD EVALUATION FOR AD79X4CBZ
      Data Sheet
      AD7904/AD7914/AD7924
      Rev. C | Page 11 of 32
      PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
      1
      2
      3
      4
      5
      6
      7
      8
      DIN
      CS
      AGND
      REFIN
      AVDD
      SCLK
      AGND
      16
      15
      14
      13
      12
      11
      10
      9
      VDRIVE
      DOUT
      AGND
      VIN2
      VIN3
      VIN1
      VIN0
      AGND
      AD7904/
      AD7914/
      AD7924
      TOP VIEW
      (Not to Scale)
      03087-
      003
      Figure 3. Pin Configuration
      Table 6. Pin Function Descriptions
      Pin No.
      Mnemonic
      Function
      1
      SCLK
      Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the part. This clock input is also
      used as the clock source for the AD7904/AD7914/AD7924 conversion process.
      2
      DIN
      Data In, Logic Input. Data to be written to the control register of the AD7904/AD7914/AD7924 is provided on
      this input and is clocked into the register on the falling edge of SCLK (see the Control Register section).
      3
      CS
      Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
      AD7904/AD7914/AD7924 and frames the serial data transfer.
      4, 8, 13, 16
      AGND
      Analog Ground. Ground reference point for all analog circuitry on the AD7904/AD7914/AD7924. All analog
      input signals and any external reference signal should be referred to this AGND voltage. All AGND pins should
      be connected together.
      5, 6
      AVDD
      Analog Power Supply Input. The AVDD range for the AD7904/AD7914/AD7924 is from 2.7 V to 5.25 V. For the 0 V
      to 2 × REFIN range, AVDD should be from 4.75 V to 5.25 V.
      7
      REFIN
      Reference Input for the AD7904/AD7914/AD7924. An external reference must be applied to this input. The
      voltage range for the external reference is 2.5 V ± 1% for specified performance.
      9, 10, 11,
      12
      VIN3, VIN2,
      VIN1, VIN0
      Analog Input 0 through Analog Input 3. The four single-ended analog input channels are multiplexed into the
      on-chip track-and-hold. The analog input channel to be converted is selected using the address bits ADD1 and
      ADD0 of the control register. The address bits, in conjunction with the SEQ1 and SEQ0 bits, allow the sequencer
      to be programmed. The input range for all input channels can extend from 0 V to REFIN or from 0 V to 2 × REFIN
      as selected via the RANGE bit in the control register. Any unused input channels should be connected to AGND
      to avoid noise pickup.
      14
      DOUT
      Data Out, Logic Output. The conversion result from the AD7904/AD7914/AD7924 is provided on this output as a
      serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the
      AD7904 consists of two leading zeros, two address bits indicating which channel the conversion result
      corresponds to, followed by the eight bits of conversion data, followed by four trailing zeros, provided MSB first.
      The data stream from the AD7914 consists of two leading zeros, two address bits indicating which channel the
      conversion result corresponds to, followed by the 10 bits of conversion data, followed by two trailing zeros,
      provided MSB first. The data stream from the AD7924 consists of two leading zeros, two address bits indicating
      which channel the conversion result corresponds to, followed by the 12 bits of conversion data, provided MSB
      first. The output coding can be selected as straight binary or twos complement via the CODING bit in the
      control register.
      15
      VDRIVE
      Logic Power Supply Input. The voltage supplied at this pin determines the voltage at which the serial interface
      of the AD7904/AD7914/AD7924 operates.
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