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| 型號： | AD7924BRU |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 4CH 1MSPS 16-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 13.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個單端，單極 |
| 配用： | EVAL-AD79X4CBZ-ND - BOARD EVALUATION FOR AD79X4CBZ |
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AD7904/AD7914/AD7924
Data Sheet
Rev. C | Page 14 of 32
TERMINOLOGY
Integral Nonlinearity (INL)
INL is the maximum deviation from a straight line passing through
the endpoints of the ADC transfer function. The endpoints of the
transfer function are zero scale, a point 1 LSB below the first code
transition, and full scale, a point 1 LSB above the last code transition.
Differential Nonlinearity (DNL)
DNL is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Offset Error
Offset error is the deviation of the first code transition (00 … 000
to 00 … 001) from the ideal, that is, AGND + 1 LSB.
Offset Error Match
Offset error match is the difference in offset error between any
two channels.
Gain Error
Gain error is the deviation of the last code transition (111 … 110
to 111 … 111) from the ideal, that is, REFIN 1 LSB, after the
offset error has been adjusted out.
Gain Error Match
Gain error match is the difference in gain error between any
two channels.
Zero Code Error
Zero code error is the deviation of the midscale transition (all
0s to all 1s) from the ideal VIN voltage, that is, REFIN 1 LSB. It
applies when using the twos complement output coding option
with the 2 × REFIN input range (REFIN to +REFIN biased about
the REFIN point).
Zero Code Error Match
Zero code error match is the difference in zero code error
between any two channels.
Positive Gain Error
Positive gain error is the deviation of the last code transition
(011 … 110 to 011 … 111) from the ideal, that is, +REFIN 1 LSB,
after the zero code error is adjusted out. It applies when using
the twos complement output coding option with the 2 × REFIN
input range (REFIN to +REFIN biased about the REFIN point).
Positive Gain Error Match
Positive gain error match is the difference in positive gain error
between any two channels.
Negative Gain Error
Negative gain error is the deviation of the first code transition
(100 … 000 to 100 … 001) from the ideal, that is, REFIN + 1 LSB,
after the zero code error is adjusted out. It applies when using
the twos complement output coding option with the 2 × REFIN
input range (REFIN to +REFIN biased about the REFIN point).
Negative Gain Error Match
Negative gain error match is the difference in negative gain
error between any two channels.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of cross-
talk between channels. It is measured by applying a full-scale
400 kHz sine wave signal to all three nonselected input channels
and determining how much that signal is attenuated in the
selected channel with a 50 kHz signal. The figure is given worst
case across all four channels for the AD7904/AD7914/AD7924.
Power Supply Rejection (PSR)
Variations in power supply affect the full-scale transition but not
the linearity of the converter. PSR is the maximum change in
the full-scale transition point due to a change in power supply
voltage from the nominal value (see Figure 6).
Power Supply Rejection Ratio (PSRR)
PSRR is the ratio of the power in the ADC output at full-scale
frequency, f, to the power of a 200 mV p-p sine wave applied to
the ADC AVDD supply of frequency fS.
PSRR(dB) = 10 log(Pf/Pfs)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS coupled onto the ADC AVDD supply.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns to track mode at the end
of a conversion. Track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±1 LSB, after the end of a conversion.
Signal to (Noise + Distortion) (SINAD) Ratio
SINAD is the measured ratio of signal to (noise + distortion) at
the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (fS/2), excluding dc. The ratio is
dependent on the number of quantization levels in the digitiza-
tion process: the more levels, the smaller the quantization noise.
The theoretical SINAD ratio for an ideal N-bit converter with a
sine wave input is given by
Signal to (Noise + Distortion) = (6.02 N +1.76) dB
Thus, for a 12-bit converter, SINAD is 74 dB, for a 10-bit
converter, it is 62 dB, and for an 8-bit converter, it is 50 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the funda-
mental. For the AD7904/AD7914/AD7924, it is defined as
1
2
6
2
5
2
4
2
3
2
log
20
(dB)
V
THD
+
=
where:
V1 is the rms amplitude of the fundamental.
V2, V3, V4, V5, and V6 are the rms amplitudes of the second
through the sixth harmonics.
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參數(shù)描述 |
|---|---|
| AD7924BRU-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 16-Pin TSSOP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1MSPS 12-BIT SERL 16TSSOP - Tape and Reel |
| AD7924BRU-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 16-Pin TSSOP T/R |
| AD7924BRUZ | 功能描述:IC ADC 12BIT 4CH W/SEQ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7924BRUZ-REEL | 功能描述:IC ADC 12BIT 4CH W/SEQ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7924BRUZ-REEL7 | 功能描述:IC ADC 12BIT 4CH W/SEQ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
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