參數(shù)資料
型號： AD7911AUJZ-R2
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 2-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝： ROHS COMPLIANT, MO-193BA, TSOT-8
文件頁數(shù)： 23/28頁
文件大?。?/td> 346K
代理商： AD7911AUJZ-R2
AD7911/AD7921
Rev. A | Page 4 of 28
Parameter
A Grade1
Unit
Test Conditions/Comments
CONVERSION RATE
Conversion Time
2.8
μs max
14 SCLK cycles with SCLK at 5 MHz
Track-and-Hold Acquisition Time2
290
ns max
Throughput Rate
250
kSPS max
POWER REQUIREMENTS
VDD
2.35/5.25
V min/max
IDD
Digital I/Ps = 0 V or VDD
Normal Mode (Static)
3
mA typ
VDD = 4.75 V to 5.25 V, SCLK on or off
1.5
mA typ
VDD = 2.35 V to 3.6 V, SCLK on or off
Normal Mode (Operational)
4
mA max
VDD = 4.75 V to 5.25 V, fSAMPLE = 250 kSPS
2
mA max
VDD = 2.35 V to 3.6 V, fSAMPLE = 250 kSPS
Full Power-Down Mode (Static)
1
μA max
SCLK on or off, typically 50 nA
Full Power-Down Mode (Dynamic)
0.38
mA typ
VDD = 5 V, fSCLK = 5 MHz, fSAMPLE = 25 kSPS
0.2
mA typ
VDD = 3 V, fSCLK = 5 MHz, fSAMPLE = 25 kSPS
Power Dissipation4
Normal Mode (Operational)
20
mW max
VDD = 5 V, fSAMPLE = 250 kSPS
6
mW max
VDD = 3 V, fSAMPLE = 250 kSPS
Full Power-Down
5
μW max
VDD = 5 V
1 Operational from VDD = 2 V, with VIH = 1.9 V minimum and VIL = 0.1 V maximum.
2 See the Terminology section.
3 Guaranteed by characterization.
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