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參數(shù)資料
| 型號(hào)： | AD7895ANZ-3 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SRL 5V 8DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 192k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 20mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類(lèi)型： | 1 個(gè)單端，雙極 |
AD7895
–3–
REV. 0
TIMING CHARACTERISTICS1, 2
Parameter
A, B Versions
Units
Test Conditions/Comments
t1
40
ns min
CONVST
Pulse Width
t2
352
ns min
SCLK High Pulse Width
t3
35
2
ns min
SCLK Low Pulse Width
t4
60
3
ns max
Data Access Time after Falling Edge of SCLK, VDD = 5 V ± 5%
t5
10
ns min
Data Hold Time after Falling Edge of SCLK
t6
50
4
ns max
Bus Relinquish Time after Falling Edge of SCLK
NOTES
1 Sample tested at +25
°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.4 V.
2The SCLK maximum frequency is 15 MHz. Care must be taken when interfacing to account for the data access time, t
4, and the setup time required for the user's
processor. These two times will determine the maximum SCLK frequency that the user’s system can operate with. See “Serial Interface” section for more information.
3 Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.0 V.
4 Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 6, quoted in the timing characteristics is the true bus relinquish time
of the part and, as such, is independent of external bus loading capacitances.
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to GND
AD7895-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±17 V
AD7895-2, AD7895-3 . . . . . . . . . . . . . . . . . . . –5 V, +10 V
Reference Input Voltage to GND . . . . –0.3 V to VDD + 0.3 V
Digital Input Voltage to GND . . . . . . . –0.3 V to VDD + 0.3 V
Digital Output Voltage to GND . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150
°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA Thermal Impedance
. . . . . . . . . . . . . . . . . . . . 130
°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . +260
°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA Thermal Impedance
. . . . . . . . . . . . . . . . . . . . 170
°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°C
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7895 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
(VDD = +5 V, GND = 0 V, REF IN = +2.5 V)
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
Temperature Range
Linearity Error (LSB)
SNR (dB)
Package Option*
AD7895AN-2
–40
°C to +85°C
±1 LSB
70 dB
N-8
AD7895AR-2
–40
°C to +85°C
±1 LSB
70 dB
SO-8
AD7895BR-2
–40
°C to +85°C
±1 LSB
70 dB
SO-8
AD7895AN-10
–40
°C to +85°C
±1 LSB
70 dB
N-8
AD7895AR-10
–40
°C to +85°C
±1 LSB
70 dB
SO-8
AD7895BR-10
–40
°C to +85°C
±1 LSB
70 dB
SO-8
AD7895AN-3
–40
°C to +125°C
±1 LSB
70 dB
N-8
AD7895AR-3
–40
°C to +85°C
±1 LSB
70 dB
SO-8
*N = Plastic DIP, SO = SOIC.
+1.6V
2.0mA
50pF
TO
OUTPUT
PIN
Figure 1. Load Circuit for Access Time and Bus
Relinquish Time
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