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參數(shù)資料
| 型號： | AD7888BRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT SRL 125KSPS 16SOIC |
| 標準包裝： | 48 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 125k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 3.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
AD7888
–7–
CONTROL REGISTER
The Control Register on the AD7888 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7888 on the rising
edge of SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires
16 serial clocks for every data transfer. Only the information provided on the first 8 rising clock edges (after
CS falling edge) is loaded
to the Control Register. MSB denotes the first bit in the data stream. The bit functions are outlined in Table I. The default contents
of the Control Register on power-up is all zeros.
Table I. Control Register Bit Function Description
MSB
C
T
N
O
DO
R
E
Z2
D
A1
D
A0
D
AF
E
R1
M
P0
M
P
Bit
Mnemonic
Comment
7
DONTC
Don’t Care. The value written to this bit of the Control Register is a don’t care, i.e., it doesn’t matter if the bit is
0 or 1.
6
ZERO
A zero must be written to this bit to ensure correct operation of the AD7888.
5
ADD2
These three address bits are loaded at the end of the present conversion sequence and select which analog input
4
ADD1
channel is converted for the next conversion. The selected input channel is decoded as shown in Table II.
3
ADD0
2
REF
Reference Bit. With a 0 in this bit, the on-chip reference is enabled. With a 1 in this bit, the on-chip reference
is disabled. To obtain best performance from the AD7888, the internal reference should be disabled when
using an externally applied reference source. (See On-Chip Reference section.)
1, 0
PM1, PM0
Power Management Bits. These two bits decode the mode of operation of the AD7888 as shown in Table III.
PERFORMANCE CURVES
Figure 2 shows a typical FFT plot for the AD7888 at 100 kHz
sample rate and 10 kHz input frequency.
FREQUENCY – kHz
–10
0
48.83
dB
12.21
24.41
36.62
–30
–50
–70
–90
–110
4096 POINT FFT
SAMPLING
100kSPS
fIN = 10kHz
SNR = 70dB
Figure 2. Dynamic Performance
Figure 3 shows a typical plot for the SNR vs. frequency for a
5 V supply and with a 5 V external reference.
71.0
0
42.14
SNR
–
dB
73.0
72.5
72.0
71.5
10.89
31.59
VDD = 5V
5V EXT REFERENCE
21.14
INPUT FREQUENCY – kHz
Figure 3. SNR vs. Input Frequency
REV. C
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