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參數(shù)資料
| 型號(hào)： | AD7880BRZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT MONO LP 24-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 66k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 50mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極；2 個(gè)單端，雙極 |
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AD7880
–4–
REV. 0
PIN FUNCTION DESCRIPTION
Pin
No.
Mnemonic Function
1VINA
Analog Input.
2VINB
Analog Input.
3
AGND
Analog Ground.
4VREF
Voltage Reference Input. This is normally tied to VDD.
5
CS
Chip Select. Active Low Logic input. The device is selected when this input is active.
6
CONVST
Convert Start. A low to high transition on this input puts the track/hold into hold mode and starts con-
version. This input is asynchronous to the CLKIN and is independent of CS and RD.
7
RD
Read. Active Low Logic Input. This input is used in conjunction with CS low to enable data outputs.
8
BUSY
Active Low Logic Output. This status line indicates converter status. BUSY is low during conversion.
9
CLKIN
Clock Input. TTL-compatible logic input. Used as the clock source for the A/D converter. The mark/
space ratio of the clock can vary from 40/60 to 60/40.
10
DGND
Digital Ground.
11 . . . 22
DB0–DB11 Three-State Data Outputs. These become active when CS and RD are brought low.
23
MODE
MODE Input. This input is used to put the device into the power save mode (MODE = 0 V). During
normal operation, the MODE input will be a logic high (MODE = VDD).
24
VDD
Power Supply. This is nominally +5 V.
ORDERING GUIDE
Bipolar
Full-Scale
Zero
Temperature
Error
Package
Model
Range
(LSBs)
Option*
AD7880BN
–40
°C to +85°C ±15
±10
N-24
AD7880BQ
–40
°C to +85°C ±15
±10
Q-24
AD7880CN
–40
°C to +85°C ± 5
± 5
N-24
AD7880CQ
–40
°C to +85°C ± 5
± 5
Q-24
AD7880BR
–40
±10
R-24
AD7880CR
–40
°C to +85°C ± 5
± 5
R-24
*N = Plastic DIP; Q = Cerdip; R = SOIC (Small Outline Integrated Circuit).
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
24
23
22
21
20
19
18
17
16
15
AD7880
AGND
CLKIN
DGND
DB0
DB1
DB2
DB3
DB4
DB5
DB6
VDD
DB8
VINA
VINB
DB7
DB9
DB10
DB11
MODE
CS
CONVST
RD
BUSY
VREF
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| AD7880CN | 制造商:Analog Devices 功能描述:ADC Single SAR 66ksps 12-bit Parallel 24-Pin PDIP |
| AD7880CNZ | 功能描述:IC ADC 12BIT MONO LOW PWR 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD7880CQ | 制造商:Analog Devices 功能描述:ADC Single SAR 66ksps 12-bit Parallel 24-Pin CDIP 制造商:Rochester Electronics LLC 功能描述:12 BIT ADC IC - Bulk |
| AD7880CR | 功能描述:IC ADC 12BIT MONO LP 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7880CR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 66ksps 12-bit Parallel 24-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 66KSPS 12-BIT PARALLEL 24SOIC W - Tape and Reel |
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