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| 型號： | AD7879WARUZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT CTLR TOUCH 16TSSOP |
| 標準包裝： | 2,500 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 12 b |
| 評估套件： | * |
| 數(shù)據接口： | 串行，SPI? |
| 數(shù)據速率/采樣率 (SPS，BPS)： | 105k |
| 電壓基準： | 內部 |
| 電源電壓： | 1.6 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
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AD7879/AD7889
Rev. C | Page 26 of 40
CONTROL REGISTERS
DISABLE
PENIRQ
CHNL
ADD2
CHNL
ADD1
CHNL
ADD0
ADC
MODE1
ADC
MODE0
ACQ1 ACQ0 TMR7 TMR6 TMR5 TMR4 TMR3 TMR2 TMR1 TMR0
07667-
029
15
0
Figure 30. Control Register 1
CONTROL REGISTER 1
Control Register 1 (Address 0x01) contains the ADC channel
address and the ADC mode bits. It sets the acquisition time and
the timer. It also contains a bit to disable the pen interrupt.
Control Register 1 should always be the last register programmed
prior to starting conversions. Its power-on default value is 0x0000.
To change any parameter after conversion has begun, the part
must first be put into ADC Mode 00. Make the changes, and
then reprogram Control Register 1, ensuring that it is always
the last register programmed before conversions begin.
Timer (Control Register 1, Bits[7:0])
The TMR bits in Control Register 1 set the conversion interval
timer, which enables the ADC to perform a conversion sequence
at regular intervals from 550 s (00000001) up to 9.440 ms
(11111111) in increments of 35 s (see Table 18). The default
value of these bits is 00000000, which enables the ADC to
perform one conversion only.
In slave mode, the timer starts as soon as the conversion sequence
is finished. In master mode, the timer starts at the end of a conver-
sion sequence only if the screen remains touched. If the touch is
released at any stage, the timer stops. The next time that the
screen is touched, a conversion sequence begins immediately.
Table 18. Timer Selection
TMR[7:0]
Conversion Interval
00000000
Convert one time only (default)
00000001
Every 550 s
00000010
Every 585 s
00000011
Every 620 s
…
11111101
Every 9.370 ms
11111110
Every 9.405 ms
11111111
Every 9.440 ms
Acquisition Time (Control Register 1, Bits[9:8])
The ACQ bits in Control Register 1 allow the selection of acquisi-
tion times for the ADC of 2 s (default), 4 s, 8 s, or 16 s. The
user can program the ADC with an acquisition time suitable for
the type of signal being sampled. For example, signals with large
RC time constants can require longer acquisition times.
Table 19. Acquisition Time Selection
ACQ1
ACQ0
Acquisition Time
0
4 clock periods (2 s)
0
1
8 clock periods (4 s)
1
0
16 clock periods (8 s)
1
32 clock periods (16 s)
ADC Mode (Control Register 1, Bits[11:10])
The mode bits select the operating mode of the ADC. The
AD7879/AD7889 have three operating modes. These modes are
selected by writing to the mode bits in Control Register 1. If the
mode bits are set to 00, no conversion is performed.
Table 20. Mode Selection
ADC
MODE1
ADC
MODE0
Function
0
Do not convert (default)
0
1
Single-channel conversion; the device is
in slave mode
1
0
Sequence 0; the device is in slave mode
1
Sequence 1; the device is in master mode
If the mode bits are set to 01, a single conversion is performed
on the channel selected by writing to the channel bits of Control
Register 1 (Bits[14:12]). At the end of the conversion, if the TMR
bits in Control Register 1 are set to 00000000, the mode bits
revert to 00 and the ADC returns to no convert mode until a
new conversion is initiated by the host. Setting the TMR bits to
a value other than 00000000 causes the conversion to be repeated.
The AD7879/AD7889 can also be programmed to automatically
convert a sequence of selected channels. The two modes for this
type of conversion are slave mode and master mode.
For slave mode operation, the channels to be digitized are selected
by setting the corresponding bits in Control Register 3. Conversion
is initiated by writing 10 to the mode bits of Control Register 1.
The ADC then digitizes the selected channels and stores the
results in the corresponding result registers. At the end of the
conversion, if the TMR bits in Control Register 1 are set to
00000000, the mode bits revert to 00 and the ADC returns to no
convert mode until a new conversion is initiated by the host.
Setting the TMR bits to a value other than 00000000 causes the
conversion sequence to be repeated.
For master mode operation, the channels to be digitized are
written to Control Register 3. Master mode is then selected by
writing 11 to the mode bits in Control Register 1. In this mode,
the wake-up on touch feature is active; therefore, conversion
does not begin immediately. The AD7879/AD7889 wait until
the screen is touched before beginning the sequence of conver-
sions. The ADC then digitizes the selected channels, and the
results are written to the result registers. Before beginning
another sequence of conversions, the AD7879/AD7889 wait for
the screen to be touched again or for a timer event if the screen
remains touched.
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