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參數(shù)資料
型號: AD7876CRZ
廠商: Analog Devices Inc
文件頁數(shù): 4/28頁
文件大小: 0K
描述: IC ADC 12BIT SAMPLING 10V 24SOIC
產(chǎn)品變化通告: Conversion Time Change
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 100k
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 95mW
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 管件
輸入數(shù)目和類型: 1 個單端,雙極
AD7870/AD7875/AD7876
Rev. C | Page 12 of 2
8
AD7876
TRACK-AND-HOLD
AMPLIFIER
TO INTERNAL
REFERENCE
2.1R
7R
VIN
REF OUT
AGND
TO INTERNAL
COMPARATOR
07
73
0-
00
9
3R
TO INTERNAL AGND
Figure 9. AD7876 Analog Input
Figure 10 shows the analog input for the AD7875. The input
range is 0 V to +5 V into an input resistance of typically 25 kΩ.
Once again, the designed code transitions occur midway
between successive integer LSB values. The output code is
straight binary with 1 LSB = FS/4096 = 5 V/4096 = 1.22 mV.
The ideal input/output transfer function is shown in Figure 12.
AD7875
TRACK-AND-HOLD
AMPLIFIER
TO INTERNAL AGND
3R
2R
VIN
AGND
TO INTERNAL
COMPARATOR
07
73
0-
01
0
Figure 10. AD7875 Analog Input
011…111
OUTPUT
CODE
AD7870 (AD7876)
011…110
100…001
100…000
0V
VIN – INPUT VOLTAGE
000…010
000…001
000…000
111…111
111…110
–FS
2
+FS – 1LSB
2
FS
1LSB =
FS = 6V (20V)
4096
07
73
0-
0
1
Figure 11. AD7870/AD7876 Transfer Function
OUTPUT
CODE
000…011
000…010
000…001
000…000
VIN – INPUT VOLTAGE
111…101
111…100
111…111
111…110
FS
1LSB =
FS = 5V
+FS – 1LSB
0V
4096
07
73
0-
0
12
Figure 12. AD7875 Transfer Function
OFFSET AND FULL-SCALE ADJUSTMENT—
AD7870
In most digital signal processing (DSP) applications, offset and
full-scale errors have little or no effect on system performance.
Offset error can always be eliminated in the analog domain
by ac coupling. Full-scale error effect is linear and does not
cause problems as long as the input signal is within the full
dynamic range of the ADC. Some applications will require
that the input signal span the full analog input dynamic range.
In such applications, offset and full-scale error have to be
adjusted to zero.
Where adjustment is required, offset error must be adjusted
before full-scale error. This is achieved by trimming the offset
of the op amp driving the analog input of the AD7870 while the
input voltage is 1/2 LSB below ground. The trim procedure is as
follows: apply a voltage of 0.73 mV(1/2 LSB) at V1 in Figure 13
and adjust the op amp offset voltage until the ADC output code
flickers between 1111 1111 1111 and 0000 0000 0000. Gain
error can be adjusted at either the first code transition (ADC
negative full-scale) or the last code transition (ADC positive full
scale). The trim procedures for both cases are as follows (see
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