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參數(shù)資料
| 型號： | AD7866 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual 1 MSPS, 12-Bit, 2-Channel SAR ADC with Serial Interface |
| 中文描述： | 雙1 MSPS的12位，雙通道SAR型ADC的串行接口 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 304K |
| 代理商： | AD7866 |
REV. 0
AD7866
–11–
analog input range will be 0 V to V
REF
and the output coding
from the part will be straight binary (for the next conversion). If this
pin is at a logic high when
CS
goes low, then the analog input
range will be 2
×
V
REF
and the output coding for the part will
be two’s complement. However, if after the falling edge of
CS
,
the logic level of the RANGE pin has changed upon the eighth
falling SCLK edge, point B, the output coding will change to the
other option without any change in the analog input range. So for
the next conversion, two’s complement output coding could be selected
with a 0 V to V
REF
input range, for example, if the RANGE pin
is low upon the falling edge of
CS
and high upon the eighth falling
SCLK edge, as shown in Figure 7. Figures 5 through 8 show
examples of timing diagrams when selecting a particular analog input
range with a particular output coding format. Table I also summarizes
the required logic level of the RANGE pin for each selection.
The Logic Input A0 is used to select the pair of channels to be
converted simultaneously. The Logic state of this pin is also
checked upon the falling edge of
CS
and the multiplexers are set
up for the next conversion. If it is low, the following conversion
STRAIGHT BINARY
0V TO V
INPUT RANGE
CS
SCLK
RANGE
D
OUT
A
D
OUT
B
1
8
16
16
1
A
B
Figure 5. Selecting 0 V to V
REF
Input Range with Straight Binary Output Coding
CS
SCLK
RANGE
D
OUT
A
D
OUT
B
1
8
16
16
1
A
B
V
V
INPUT RANGE
TWO
’
S COMPLEMENT
Figure 6. Selecting V
REF
±
V
REF
Input Range with Two’s Complement Output Coding
will be performed on Channel 1 of each ADC; if it is high,
the following conversion will be performed on Channel 2 of
each ADC.
Handling Bipolar Input Signals
Figure 9 shows how useful the combination of the 2
×
V
REF
input
range and the two’s complement output coding scheme is for
handling bipolar input signals. If the bipolar input signal is biased
about V
REF
and two’s complement output coding is selected,
then V
REF
becomes the zero code point, –V
REF
is negative full-
scale and +V
REF
becomes positive full-scale, with a dynamic
range of 2
×
V
REF
.
Transfer Functions
The designed code transitions occur at successive integer LSB
values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = V
REF
/4096.
The ideal transfer characteristic for the AD7866 when straight
binary coding is selected is shown in Figure 10 and the ideal
transfer characteristic for the AD7866 when two’s complement
coding is selected is shown in Figure 11.
Table I. Analog Input and Output Coding Selection
Range Level
@ Point A
1
Range Level
@ Point B
2
Input Range
3
Output Coding
3
Low
High
Low
High
Low
High
High
Low
0 V to V
REF
V
REF
±
V
REF
V
REF
/2
±
V
REF
/2
0 V to 2
×
V
REF
Straight Binary
Two’s Complement
Two’s Complement
Straight Binary
NOTES
1
Point A = Falling edge of
CS
.
2
Point B = Eighth falling edge of SCLK.
3
Selected for NEXT conversion.
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