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參數(shù)資料
| 型號(hào)： | AD7863ARS-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Simultaneous Sampling Dual 175 kSPS 14-Bit ADC |
| 中文描述： | 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | MO-150AH, SSOP-28 |
| 文件頁(yè)數(shù)： | 8/18頁(yè) |
| 文件大?。?/td> | 207K |
| 代理商： | AD7863ARS-3 |
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AD7863
–
8
–
REV. A
CONVERTER DETAILS
The AD7863 is a high speed, low power, dual 14-bit A/D con-
verter that operates from a single +5 V supply. The part con-
tains two 5.2
μ
s successive approximation ADCs, two track/
hold amplifiers, an internal +2.5 V reference and a high speed
parallel interface. Four analog inputs are grouped into two
channels (A and B) selected by the A0 input. Each channel has
two inputs (V
A1
and V
A2
or V
B1
and V
B2
) which can be sampled
and converted simultaneously thus preserving the relative phase
information of the signals on both analog inputs. The part
accepts an analog input range of
±
10 V (AD7863-10),
±
2.5 V
(AD7863-3) and 0 V
–
2.5 V (AD7863-2). Overvoltage protec-
tion on the analog inputs for the part allows the input voltage to
go to
±
17 V,
±
7 V or +7 V respectively, without causing dam-
age. The AD7863 has two operating modes, the high sampling
mode and the auto sleep mode where the part automatically
goes into sleep after the end of conversion. These modes are
discussed in more detail in the Timing and Control section.
Conversion is initiated on the AD7863 by pulsing the
CONVST
input. On the falling edge of
CONVST
, both on-chip track/
holds are simultaneously placed into hold and the conversion
sequence is started on both channels. The conversion clock for
the part is generated internally using a laser-trimmed clock
oscillator circuit. The BUSY signal indicates the end of conver-
sion and at this time the conversion results for both channels
are available to be read. The first read after a conversion ac-
cesses the result from V
A1
or V
B1
, while the second read ac-
cesses the result from V
A2
or V
B2
depending on whether the
multiplexer select A0 is low or high respectively before the
conversion is initiated. Data is read from the part via a 14-bit
parallel data bus with standard
CS
and
RD
signals.
Conversion time for the AD7863 is 5.2
μ
s in the high sampling
mode (10
μ
s for the auto sleep mode), and the track/hold acqui-
sition time is 0.5
μ
s. To obtain optimum performance from the
part, the read operation should not occur during the conversion
or during the 400 ns prior to the next conversion. This allows
the part to operate at throughput rates up to 175 kHz and
achieve data sheet specifications.
Track/Hold Section
The track/hold amplifiers on the AD7863 allow the ADCs to
accurately convert an input sine wave of full-scale amplitude to
14-bit accuracy. The input bandwidth of the track/hold is
greater than the Nyquist rate of the ADC, even when the ADC
is operated at its maximum throughput rate of 175 kHz (i.e.,
the track/hold can handle input frequencies in excess of 87.5 kHz).
The track/hold amplifiers acquire input signals to 14-bit accu-
racy in less than 500 ns. The operation of the track/holds are
essentially transparent to the user. The two track/hold amplifi-
ers sample their respective input channels simultaneously, on
the falling edge of
CONVST
. The aperture time for the track/
holds (i.e., the delay time between the external
CONVST
signal
and the track/hold actually going into hold) is well matched
across the two track/holds on one device and also well matched
from device to device. This allows the relative phase information
between different input channels to be accurately preserved. It
also allows multiple AD7863s to simultaneously sample more
than two channels. At the end of conversion, the part returns to
its tracking mode. The acquisition time of the track/hold ampli-
fiers begins at this point.
Reference Section
The AD7863 contains a single reference pin, labeled V
REF
,
which either provides access to the part
’
s own +2.5 V reference
or to which an external +2.5 V reference can be connected to
provide the reference source for the part. The part is specified
with a +2.5 V reference voltage. Errors in the reference source
will result in gain errors in the AD7863
’
s transfer function and
will add to the specified full-scale errors on the part. On the
AD7863-10 and AD7863-3, it will also result in an offset error
injected in the attenuator stage.
The AD7863 contains an on-chip +2.5 V reference. To use this
reference as the reference source for the AD7863, simply
connect two 0.1
μ
F disc ceramic capacitors from the V
REF
pin
to AGND. The voltage that appears at this pin is internally
buffered before being applied to the ADC. If this reference is
required for use external to the AD7863, it should be buffered
as the part has a FET switch in series with the reference output
resulting in a source impedance for this output of 5.5 k
nomi-
nal. The tolerance on the internal reference is
±
10 mV at 25
°
C
with a typical temperature coefficient of 25 ppm/
°
C and a maxi-
mum error over temperature of
±
25 mV.
If the application requires a reference with a tighter tolerance or
the AD7863 needs to be used with a system reference, the user
has the option of connecting an external reference to this V
REF
pin. The external reference will effectively overdrive the internal
reference and thus provide the reference source for the ADC.
The reference input is buffered before being applied to the
ADC with a maximum input current of
±
100
μ
A. A suitable
reference source for the AD7863 is the AD780 precision
+2.5 V reference.
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