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參數(shù)資料
| 型號： | AD7859BSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 22/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 8CHAN LP 44-MQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個單端，雙極；4 個偽差分，單極；4 個偽差分，雙極 |
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REV. A
–3–
Parameter
A Version1
B Version1
Units
Test Conditions/Comments
CONVERSION RATE
tCLKIN × 18
Conversion Time
4.5 (10)
4.5
s max
(L Versions Only, 0
°C to +70°C, 1.8 MHz CLKIN)
Track/Hold Acquisition Time
0.5 (1)
0.5
s min
(L Versions Only, –40
°C to +85°C, 1.8 MHz CLKIN)
POWER REQUIREMENTS
AVDD, DVDD
+3.0/+5.5
V min/max
IDD
Normal Mode
5
5.5 (1.95)
5.5
mA max
AVDD = DVDD = 4.5 V to 5.5 V. Typically 4.5 mA
5.5 (1.95)
5.5
mA max
AVDD = DVDD = 3.0 V to 3.6 V. Typically 4.0 mA
Sleep Mode
6
With External Clock On
10
A typ
Full Power-Down. Power Management Bits in Control
Register Set as PMGT1 = 1, PMGT0 = 0.
400
A typ
Partial Power-Down. Power Management Bits in
Control Register Set as PMGT1 = 1, PMGT0 = 1.
With External Clock Off
5
A max
Typically 1
A. Full Power-Down. Power Management
Bits in Control Register Set as PMGT1 = 1, PMGT0 = 0.
200
A typ
Partial Power-Down. Power Management Bits in
Control Register Set as PMGT1 = 1, PMGT0 = 1.
Normal Mode Power Dissipation
30 (10)
mW max
VDD = 5.5 V: Typically 25 mW (8); SLEEP = VDD
20 (6.5)
mW max
VDD = 3.6 V: Typically 15 mW (5.4); SLEEP = VDD
Sleep Mode Power Dissipation
With External Clock On
55
W typ
VDD = 5.5 V; SLEEP = 0 V
36
W typ
VDD = 3.6 V; SLEEP = 0 V
With External Clock Off
27.5
W max
VDD = 5.5 V: Typically 5.5 W; SLEEP = 0 V
18
W max
VDD = 3.6 V: Typically 3.6
W; SLEEP = 0 V
SYSTEM CALIBRATION
Offset Calibration Span
7
+0.05
× V
REF/–0.05 × VREF
V max/min
Allowable Offset Voltage Span for Calibration
Gain Calibration Span
7
+1.025
× V
REF/–0.975
× V
REF V max/min
Allowable Full-Scale Voltage Span for Calibration
NOTES
1Temperature range as follows: A, B Versions, –40
°C to +85°C.
2Specifications apply after calibration.
3SNR calculation includes distortion and noise components.
4Not production tested, guaranteed by characterization at initial product release.
5All digital inputs @ DGND except for CONVST, SLEEP, CAL, and SYNC @ DV
DD. No load on the digital outputs. Analog inputs @ AGND.
6CLKIN @ DGND when external clock off. All digital inputs @ DGND except for CONVST, SLEEP, CAL, and SYNC @ DV
DD. No load on the digital outputs.
Analog inputs @ AGND.
7The offset and gain calibration spans are defined as the range of offset and gain errors that the AD7859/AD7859L can calibrate. Note also that these are voltage spans
and are not absolute voltages (i.e., the allowable system offset voltage presented at AIN(+) for the system offset error to be adjusted out will be AIN(–)
± 0.05 × V
REF,
and the allowable system full-scale voltage applied between AIN(+) and AIN(–) for the system full-scale voltage error to be adjusted out will be VREF
± 0.025 × V
REF).
This is explained in more detail in the calibration section of the data sheet.
Specifications subject to change without notice.
AD7859/AD7859L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7859L | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs |
| AD7859LAS | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:12-BIT 8 CH.PARALLEL 100 KSPS I.C. - Bulk 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
| AD7859LAS3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS8-Channel, 12-Bit Sampling ADCs |
| AD7859LAS-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 44-Pin MQFP T/R |
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