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    參數(shù)資料
    型號: AD7856ANZ
    廠商: Analog Devices Inc
    文件頁數(shù): 11/32頁
    文件大?。?/td> 0K
    描述: IC ADC 14BIT 8CHAN 5V 24DIP
    標(biāo)準(zhǔn)包裝: 15
    位數(shù): 14
    采樣率(每秒): 285k
    數(shù)據(jù)接口: 8051,QSPI?,串行,SPI? µP
    轉(zhuǎn)換器數(shù)目: 2
    功率耗散(最大): 89.25mW
    電壓電源: 模擬和數(shù)字
    工作溫度: -40°C ~ 105°C
    安裝類型: 通孔
    封裝/外殼: 24-DIP(0.300",7.62mm)
    供應(yīng)商設(shè)備封裝: 24-PDIP
    包裝: 管件
    輸入數(shù)目和類型: 8 個單端,單極;4 個偽差分,單極
    AD7856
    –19–
    REV. A
    A combination of hardware and software selection can also be
    used to achieve the desired effect.
    Table VI. Power Management Options
    PMGT1
    PMGT0
    SLEEP
    Bit
    Pin
    Comment
    0
    Full Power-Down Between
    Conversions (HW/SW)
    0
    1
    Full Power-Up (HW/SW)
    0
    1
    X
    Normal Operation
    (Independent of the
    SLEEP
    Pin)
    1
    0
    X
    Full Power-Down (SW)
    1
    X
    Partial Power-Down Between
    Conversions
    NOTE
    HW = Hardware Selection; SW = Software Selection.
    POWER-UP TIMES
    Using an External Reference
    When the AD7856 is powered up, the part is powered up from
    one of two conditions. First, when the power supplies are ini-
    tially powered up and, secondly, when the part is powered up
    from either a hardware or software power-down (see last section).
    When AVDD and DVDD are powered up, the AD7856 should be
    left idle for approximately 42 ms (6 MHz CLK) to allow for the
    autocalibration if a 10 nF cap is placed on the
    CAL pin, (see
    Calibration section). During power-up the functionality of the
    SLEEP pin is disabled, i.e., the part will not power down until
    the end of the calibration if
    SLEEP is tied logic low. The auto-
    calibration on power-up can be disabled if the
    CAL pin is tied to
    a logic high. If the autocalibration is disabled, then the user must
    take into account the time required by the AD7856 to power-up
    before a self-calibration is carried out. This power-up time is the
    time taken for the AD7856 to power up when power is first
    applied (300
    s) typ) or the time it takes the external reference
    to settle to the 14-bit level–whichever is the longer.
    AUTO POWER
    DOWN AFTER
    CONVERSION
    AUTO CAL ON
    POWER-UP
    AVDD DVDD
    AIN(+)
    AIN(–)
    CREF1
    CREF2
    SLEEP
    DIN
    DOUT
    SYNC
    CONVST
    AGND
    DGND
    CLKIN
    SCLK
    REFIN/REFOUT
    AD7856
    ANALOG
    SUPPLY
    +5V
    0.1 F
    10 F
    0.1 F
    0.01 F
    MASTER CLOCK
    INPUT
    CONVERSION
    START INPUT
    SERIAL DATA OUTPUT
    0.1 F
    CAL
    0.01 F
    INTERNAL
    REFERENCE
    0V TO 2.5V
    INPUT
    4/6MHz OSCILLATOR
    SERIAL CLOCK
    INPUT
    100kHz PULSE GENERATOR
    OPTIONAL
    EXTERNAL
    REFERENCE
    REF-192
    SERIAL DATA INPUT
    LOW POWER
    C/ P
    CURRENT, I = 12mA TYP
    Figure 21. Typical Low Power Circuit
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