參數(shù)資料
型號: AD7845KPZ
廠商: Analog Devices Inc
文件頁數(shù): 3/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT MULT LC2MOS 28-PLCC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 39
設(shè)置時(shí)間: 5µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 150mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 200k
AD7845
REV. B
–11–
Figure 23 and 24 are the interface circuits for the Z80 and
MC6809 microprocessors. Again, these use the same basic
format as the 8085A interface.
Figure 23. AD7845 to Z80 Interface
Figure 24. MC6809 Interface
DIGITAL FEEDTHROUGH
In the preceding interface configurations, most digital inputs to
the AD7845 are directly connected to the microprocessor bus.
Even when the device is not selected, these inputs will be con-
stantly changing. The high frequency logic activity on the bus
can feed through the DAC package capacitance to show up as
noise on the analog output. To minimize this digital feedthrough
isolate the DAC from the noise source. Figure 25 shows an
interface circuit which uses this technique. All data inputs are
latched from the busy by the
CS signal. One may also use other
means, such as peripheral interface devices, to reduce the digital
feedthrough.
Figure 25. AD7845 Interface Circuit Using Latches to
Minimize Digital Feedthrough
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