參數(shù)資料
型號: AD7809BSTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 27/28頁
文件大?。?/td> 0K
描述: IC DAC 10BIT OCTAL PARALL 44TQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,500
設(shè)置時間: 1.5µs
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 模擬和數(shù)字
功率耗散(最大): 99mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 8 電壓,雙極
采樣率(每秒): 667k
AD7804/AD7805/AD7808/AD7809
REV. A
–8–
AD7805/AD7809 PIN FUNCTION DESCRIPTIONS
AD7805
AD7809
Pin No.
Mnemonic
Description
1, 11, 13,
NC
No Connect. These pins should be left open circuit.
20, 33
1
2, 5, 39, 40
AGND
Ground reference point for analog circuitry.
2, 3
41, 42
VOUTB, VOUTA
Analog output voltages from the DACs.
4
43
REFOUT
Reference Output. This is a bandgap reference and is typically 1.23 V.
5–10,
3, 4, 6, 7, 9,
DB9–DB2
Data Inputs. DB9 to DB2 are the 8 MSBs of the data word.
12, 13
10, 15, 23
19, 20
24, 26
DB1, DB0
DB1 and DB0 function as the 2 LSBs of the 10-bit word in 10-bit parallel mode but
have other functions when BYTE loading structure is used.
8, 12
VOUTF, VOUTE
Analog output voltages from the DACs.
11
14
LDAC
LDAC Input. When this digital input is taken low, all DAC registers are simultaneously
updated with the contents of the DAC data registers. If
LDAC is permanently tied low, or is
low during the rising edge of
WR similar to data inputs, an automatic update will take place.
14
16
DGND
Ground reference point for digital circuitry.
15
17
DVDD
Digital Power Supply.
16
18
WR
Write Input
WR is an active low logic input which is used in conjunction with CS and
the address pins to write data to the relevant registers.
17
21
CS
Chip Select. Active low logic input.
18
19
CLR
Asynchronous
CLR Input. When this input is taken low, all Main DAC outputs are
cleared either to VBIAS or to VBIAS/16 volts. All Sub DACs are also cleared and thus the
transfer function of the MAIN DAC will remain centered around the VBIAS point.
22, 25
VOUTH, VOUTG
Analog output voltages from the DACs.
21, 22
27, 29, 30
A2, A1, A0
DAC Address Inputs. These digital inputs are used in conjunction with
CS and WR to
determine which DAC channel control register or DAC data register is loaded from the
input register. These address bits are don’t cares when writing to the system control register.
23
31
MODE
Logic Input. Logic high enables writing to the DAC data registers, a logic low enables
writing to the control registers.
24
32
REFIN
This is an external reference input for the DAC. When this reference is selected for the DAC
in the control register, the analog output from the selected DAC swings around this point.
25
34
COMP
Compensation Pin. This pin provides an output from the internal VDD/2 divider and is
provided for ac bypass purposes only. This pin should be decoupled with 1 nF capacitors
to both AVDD and AGND. This pin can be overdriven with an external reference, thus
giving the facility for two external references on the part.
26, 27
35, 36
VOUTD, VOUTC
Analog output voltages from the DACs.
28
28, 37, 38
AVDD
Analog Power Supply.
44
PD
Active low input used to put the part into low power mode reducing current consump-
tion to 1
A.
AD7805 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD7805
DGND
DB2
DB3
LDAC
DB4
DB5
DB6
AGND
VOUTB
VOUTA
REFOUT
DB7
DB8
DB9
DVDD
WR
CS
CLR
DB1
DB0
A1
AVDD
VOUTC
VOUTD
COMP
A0
MODE
REFIN
AD7809 PIN CONFIGURATION
44 43 42 41 40 39 38 37 36 35 34
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
33
32
31
30
29
28
27
26
25
24
23
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
NC = NO CONNECT
NC
REFIN
MODE
A0
A1
AVDD
A2
DB0
VOUTG
DB1
DB2
NC
AGND
DB9
DB8
AGND
DB7
DB6
VOUTF
DB5
DB4
NC
PD
REFOUT
V
OUT
A
V
OUT
B
AGND
AV
DD
V
OUT
E
NC
LDAC
DB3
DV
DD
WR
CLR
NC
CS
V
OUT
H
DGND
AV
DD
V
OUT
C
V
OUT
D
COMP
AD7809
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