參數(shù)資料
型號: AD7746
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 24BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT
封裝: MO-153AB, TSSOP-16
文件頁數(shù): 7/17頁
文件大?。?/td> 232K
代理商: AD7746
Preliminary Technical Data
AD7745/AD7746
Rev. PrF | Page 15 of 17
CAP DAC A REGISTER
Address pointer 0x0B, default value 0x00
Capacitive DAC setup.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
DACAENA
DACA – 7-Bit Value
Default
0
0x00
Bit
Mnemonic
Description
7
DACAENA
DACAENA = 1 connects capacitive DAC A to the positive capacitance input.
6-1
DACA
DAC A value, code 0x00
≈ 0pF, code 0x7F ≈ Full Range
CAP DAC B REGISTER
Address pointer 0x0C, default value 0x00
Capacitive DAC setup.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
DACBENB
DACB – 7-Bit Value
Default
0
0x00
Bit
Mnemonic
Description
7
DACBENB
DACBENB = 1 connects capacitive DAC B to the positive capacitance input.
6-1
DACB
DAC B value, code 0x00
≈ 0pF, code 0x7F ≈ Full Range
CAP OFFSET REGISTER
16 bits, address pointer 0x0D, 0x0E default value 0x8000
Capacitive offset calibration register. The register holds capacitive channel zero-scale calibration coefficient. The value in this register is
used to digitally remove the capacitive channel offset. The value in this register is updated automatically following the execution of a ca-
pacitance offset calibration. The capacitive offset calibration resolution (cap offset register LSB) is less than 32 aF, the full range is 1 pF. On
the AD7746, the register is shared by the two capacitive channels.
CAP GAIN REGISTER
16 bits, address pointer 0x0F, 0x10, default value 0xXXXX
Capacitive gain calibration register. The register holds capacitive channel full scale factory calibration coefficient.
VOLT GAIN REGISTER
16 bits, address pointer 0x11,0x12, default value 0xXXXX
Voltage gain calibration register. The register holds voltage channel full scale factory calibration coefficient.
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